abstract in order to determine the time of maximum demand of winter wheat (triticum aestivum l.) to phosphorous fertilizers and p and zinc (zn) distribution in different parts of wheat at various growth stages and study their relation to the contents of these elements in soil p and zn under field conditions, samples were collected from different parts of the plants at seven growth stages (i.e.,...

To make error correcting codes easier to use and analyze, it is necessary to impose some algebraic structure on them. It is especially useful to have an alphabet in which it is possible to add, subtract, multiply and divide without restriction. In other words we wish to construct a finite field. Evarist Galois (1811-32), a French mathematician who died in a duel at the age of 20 introduced fini...

To ensure the selection of wheat genotypes that are resilient to future climatic conditions, with drought already being most significant and acute problem in many areas, twenty winter cultivars were tested for stress tolerance from beginning stem elongation (DC 30; Zadoks decimal codes) 49 days (until stage grain development, DC 73–75) within an automatic phenotyping platform. The control plant...

A prerequisite to study the molecular genetic pathways of pollen and anther development is an accurate staging system for reproductive development. However in barley, floret formation occurs mainly within the pseudostem, which makes the observation of floret development and access to the floret particularly difficult without dissecting the plant. Thus selecting stages for molecular analysis can...

In CMOS integrated circuits, electronic memories are widely used. As transistor size shrinks, multiple cell upsets are becoming an increasingly important factor in the reliability of memories exposed to radiation effects. To prevent the MCUs from causing data corruption, more complex error correction codes (ECCs) are widely used to protect memory. Recently, matrix codes (MCs) based on Hamming c...

Decimal-to-binary conversion is important to modern binary computers. The classical method to solve this problem is based on division operation. In this paper, we investigate a decimal-to-binary conversion method based on addition operation. The method is very easily implemented by software. The cost analysis shows that the latter is more preferable than the classical method. Thus the current I...

Decimal hardware arithmetic units have recently regained popularity, as there is now a high demand for high performance decimal arithmetic. We propose a novel method for carry-free addition of decimal numbers, where each equally weighted decimal digit pair of the two operands is partitioned into two weighted bit-sets. The arithmetic values of these bit-sets are evaluated, in parallel, for fast ...

[1] V. Radeka, 'Fast decimal counting with binary-decimal logic," IEEE Trans. on Nuclear Science, vol. NS-1 1, pp. 296-301, January 1965. [2] H. Stopper, "Ermittlung des Codes und der logischen Schaltung einer Zahlerdekade," Telefunken Ztg., vol. 33, pp. 13-19, March 1960. 13] Z. Tarczy-Hornoch, "Five-binary counting technique makes faster decimal counting units, Electronic Design, vol. 9, pp. ...

The CMOS technology scales down to nano scale and memories are combined with an increasing number of electronic systems; the error rate in memory cells is rapidly increasing. Especially error occurs when memories operate in space satellites due to ionizing effects of atmospheric neutron, alpha-particle, and cosmic rays. SRAM Based FPGA’s are used mostly in Space satellites, which are sensitive ...