quantum dot cellular automata (qca) is one of the important nano-level technologies for implementation of both combinational and sequential systems. qca have the potential to achieve low power dissipation and operate high speed at thz frequencies. however large probability of occurrence fabrication defects in qca, is a fundamental challenge to use this emerging technology. because of these vari...

A new 2xVDD-tolerant mixed-voltage I/O buffer circuit, realized with only 1xVDD devices in deep-submicron CMOS technology, to prevent transistors against gate-oxide reliability and hot-carrier degradation is proposed. The new proposed 2xVDD-tolerant I/O buffer has been designed and fabricated in a 0.13-lm CMOS process with only 1.2-V devices to serve a 2.5-V/1.2-V mixed-voltage interface, witho...

I make a rough estimate of the accuracy threshold for fault tolerant quantum computing with concatenated codes. First I consider only gate errors and use the depolarizing channel error model. I will follow P.Shor [1] for fault tolerant error correction (FTEC) and the fault tolerant implementation of elementary operations on states encoded by the 7-qubit code. A simple computer simulation sugges...

Implementing a unitary operation using a universal gate set is a fundamental problem in quantum computing. The problem naturally arises when we want to implement some quantum algorithm on a fault tolerant quantum computer. Most fault tolerant protocols allow one to implement only Clifford circuits (those generated by CNOT, Hadamard and Phase gates). To achieve universal quantum computation one ...

At its most fundamental level, circuit-based quantum computation relies on the application of controlled phase shift operations on quantum registers. While these operations are generally compromised by noise and imperfections, quantum gates based on geometric phase shifts can provide intrinsically fault-tolerant quantum computing. Here we demonstrate the high-fidelity realization of a recently ...

In this paper a circuit design technique to improve noise tolerant of a new CMOS domino logic family called feedthrough logic is presented. The feedthrough logic improves the performance of arithmetic circuit as compared to static CMOS and domino logic but its noise tolerant is very less. A 2-input NAND gate is designed by the proposed technique. The ANTE (average noise threshold energy) metric...

Quantum and reversible logic circuits have more advantages than the common circuits, like low power consumption. These circuits are good choice to design future computers. One of the important issues in reversible logic is parity preservation. If parity of inputs and outputs are equal in reversible gate, this gate will be parity preserve. Reversible circuits made by these gates are parity prese...

A Fault tolerant reversible logic has gained importance as they consume low power and less heat dissipation. The benefits of logical reversibility can be gained only after employing physical reversibility. Every future technology will have to use reversible gates in order to reduce power. This paper proposed a new fault tolerant reversible 4*4 RR-gate which satisfies the reversible and parity p...