reconfigurable instruction set processors allow customization for an application domain by extending the core instruction set architecture. extracting appropriate custom instructions is an important phase for implementing an application on a reconfigurable instruction set processor. a custom instruction (ci) is usually extracted from critical portions of applications and implemented on a reconf...

We describe four partitioning strategies, or patterns, used to decompose a serial application into multiple concurrently executing parts. These partitioning strategies augment the commonly used task and data parallel patterns by recognizing that applications are spatiotemporal in nature. Therefore, data and instruction decomposition are further distinguished by whether the partitioning is done ...

This paper describes the tight integration of design space exploration with spatial and temporal partitioning algorithms in the SPARCS design automation system for RCs. In particular, this paper describes a novel technique to perform efficient design space exploration of parallel-process behaviors using the knowledge of spatial partitioning. The exploration technique satisfies the design latenc...

We present an automated temporal partitioning and design space exploration methodology that temporally partitions behavior speci cations. We propose block-processing in the temporal partitioning framework for reducing the recon guration overhead for partitioned designs. Block-processing is a technique used traditionally in the area of parallel compilers, for increasing the computation speed by ...

We present an automated temporal partitioning and design space exploration methodology that temporally partitions behavior speciications. We propose block-processing in the temporal partitioning framework for reducing the reconngura-tion overhead for partitioned designs. Block-processing is a technique used traditionally in the area of parallel compilers, for increasing the computation speed by...

In this paper, a temporal partitioning algorithm is presented which partitions data flow graphs in a realtime domain. Timing constraint is a critical factor in temporal partitioning of real-time reconfigurable design. An incremental algorithm is presented to partition data flow graphs while meeting the timing constraints by obtaining the target number of partitions. In addition, the proposed al...

This work presents four partitioning strategies, or design patterns, useful for decomposing a serial application into multiple concurrently executing parts. These partitioning strategies augment the commonly used task and data parallel design patterns by recognizing that applications are spatiotemporal in nature. Therefore, data and instruction decomposition are further distinguished by whether...