An overview is presented of the hybrid AlGaInAs-silicon platform that enables wafer level integration of III-V optoelectronic devices with silicon photonic devices based on silicon-on-insulator (SOI). Wafer bonding AlGaInAs quantum wells to an SOI wafer allows large scale hybrid integration without any critical alignment steps. Discrete hybrid silicon optical amplifiers, lasers and photodetecto...

The cost-effectiveness of market-dominating silicon wafer solar cells plays a key role in determining the competiveness of solar energy with other exhaustible energy sources. Reducing the silicon wafer thickness at a minimized efficiency loss represents a mainstream trend in increasing the cost-effectiveness of wafer-based solar cells. In this paper we demonstrate that, using the advanced light...

A novel laser that utilizes a silicon waveguide bonded to AlGaInAs quantum wells is demonstrated. This wafer scale fabrication approach allows the optical waveguide to be defined by CMOS-compatible silicon processing while optical gain is provided by III-V materials. The AlGaInAs quantum well structure is bonded to the silicon wafer using low temperature oxygen plasma-assisted wafer bonding. Th...

This work presents a high yield wafer scale fabrication of MEMS-based unimorph silicon/PZT thick film vibrational energy harvesters aimed towards vibration sources with peak frequencies in the range of a few hundred Hz. By combining KOH etching with mechanical front side protection, SOI wafer to accurately define the thickness of the silicon part of the harvester and a silicon compatible PZT th...

We have demonstrated a new PEDAL process to make sub-25 nm nanowires template across the entire Silicon (110) wafer suitable for wafer-scale nanoimprinting. The “PEDAL lift-off” has the ability to fabricate metal nanowires directly on the wafers without using nanoimprint techniques. The process involves defining the edge by etching a trench, patterned using conventional i-line lithography, and ...

The majority of semiconductor devices are built on silicon wafers. Manufacturing of high quality silicon wafers involves several machining processes including grinding. This review paper discusses historical perspectives on grinding of silicon wafers, impacts of wafer size progression on applications of grinding in silicon wafer manufacturing, and interrelationships between grinding and two oth...

Silicon wafer thickness reduction without increasing the wafer strength leads to a high fracture rate during subsequent handling and processing steps. Cracking of solar cells has become one of the major sources of solar module failure and rejection. Hence, it is important to evaluate the mechanical strength of solar cells and factors influencing this. The purpose of this work is to understand t...

The majority of solar cells produced today are made with crystalline silicon wafers, which are typically manufactured by growing a large piece of silicon and then sawing it into ~200 pm wafers, a process which converts one-half of the high-purity silicon into waste sawdust. To bypass the sawing process, a new method for making high-quality multicrystalline wafers without sawing is under develop...

By combining nanosphere lithography with template stripping, silicon wafers were patterned with hexagonal arrays of nanowells or pillars. These silicon masters were then replicated in gold by metal evaporation, resulting in wafer-scale hexagonal gratings for plasmonic applications. In the nanosphere lithography step, two-dimensional colloidal crystals of 510 nm diameter polystyrene spheres were...

 In through-wafer silicon etching using highdensity low-pressure inductively coupled plasma, a notching (or footing) effect occurs at the silicon-insulator interface. The insulator layer is common, as the silicon wafer has either an oxide layer to avoid break through of the plasma or is bonded to a handle wafer using either photoresist or other adhesives. Notching at the foot of micro-structur...