Dependency relations between objects in a railway yard are tabulated in control tables. An interlocking, which guarantees validity of these dependencies, can be implemented in ladder logic. We transform a ladder logic diagram into a Boolean formula, so that validity of the dependencies in the control tables can be verified using a theorem prover. Time copies and invariants are added to the form...

Dependency relations between objects in a railway yard are tabulated in control tables. An interlocking, which guarantees validity of these dependencies, can be implemented in ladder logic. We transform a ladder logic diagram into a Boolean formula, so that validity of the dependencies in the control tables can be veri ed using a theorem prover. Time copies and invariants are added to the formu...

In this research paper an attempt has been made to integrate the programmable logic controller (PLC) with elevator for developing its control system. Thus, this paper describes the application of programmable logic controller for elevator control system. The PLC used for this project is GE FANUC with six inputs and four outputs. The programming language used is ladder diagram.

A Gelfand-Cetlin polytope is a convex polytope obtained as an image of certain completely integrable system on a partial flag variety. In this paper, we give an equivalent description of the face structure of a GC-polytope in terms of so called the face structure of a ladder diagram. Using our description, we obtain a partial differential equation whose solution is the exponential generating fu...

Programmable Logic Controllers ensure the control of many reactive systems. These controllers are most of the time programmed with the languages defined in the IEC 61131– 3 standard. Our goal is the verification of safety properties of programs written in one of these languages: the Ladder Diagram. The main approaches in this field are based on ModelChecking. We propose in this article a Theore...

We describe our approach to the automated verification of Ladder Diagrams programs. This combines a formal semantics for a large fragment of the LD language (including a modeling of timed function blocks), and a powerful temporal logic model checking technology.