Fabrication of an integrated circuit with smaller area, besides reducing the cost of manufacturing, usually causes a reduction in the power dissipation and propagation delay. Using the static CMOS technology to fabricate a circuit that realizes a specific logic function and occupies a minimum space, it must be implemented with continuous diffusion runs. Therefore, at the design stage, an Euleri...

Fabrication of an integrated circuit with smaller area, besides reducing the cost of manufacturing, usually causes a reduction in the power dissipation and propagation delay. Using the static CMOS technology to fabricate a circuit that realizes a specific logic function and occupies a minimum space, it must be implemented with continuous diffusion runs. Therefore, at the design stage, an Euleri...

 The DSCH program is a logic editor and simulator designed by a research group under the leadership of E.Sicard, a professor of INSA of Toulouse . DSCH is used to validate the architecture of the logic circuit before the microelectronics design is started. DSCH provides a user-friendly environment for hierarchical logic design, and fast simulation with delay analysis, which allows the design a...

Application specific full custom design integrated circuit is a methodology for making a logic cell, circuit or layout specification. Full custom design circuit is the part of Application specific integrated circuit. A gate array or uncommitted logic array as an approach to the design and manufacture of application specific integrated circuit. It requires custom chip fabrication using a complet...

− There’re mainly two different situations for testing PLD (Programmable Logic Device) devices. One is testing of blank chips that haven’t been programmed; the other is testing of ASIC (Application Specific Integrated Circuit) devices that have been programmed. This paper presents a test method for programmed ASIC devices, including auto test and ATPG (Auto Test Pattern Generation) method for b...

In order to address the challenges of future integrated circuit design, both logic synthesis and physical design will need to be tightly integrated. This includes integrating the circuit structure information produced by logic synthesis with the placement stage of physical design. The first step is to determine the effects of partitioning decisions on placement performance. This paper describes...

We demonstrate a scalable and reconfigurable optical directed-logic architecture consisting of a regular array of integrated optical switches based on microring resonators. The switches are controlled by electrical input logic signals through embedded p-i-n junctions. The circuit can be reconfigured to perform any combinational logic operation by thermally tuning the operation modes of the swit...