the graphical technique for nonlinear circuits was described that enable us to optimize circuits to obtain maximum output power, maximum efficiency or minimum intermodulation. according to this method a high power amplifier in the ka band was designed. using a nonlinear model of the transistor, optimum slope for load-line was determined so that maximum power at the output was obtainable, then ...

Abstract- A novel low-voltage two-stage operational amplifier employing resistive biasing is presented. This amplifier implements neutralization and correction common mode stability in second stage while employs capacitive dc level shifter and coupling between two stages. The structure reduces the power consumption and increases output voltage swing. The compensation is performed by simple mill...

a digital look-up table adaptive predistortion technique using a six-port receiver for power amplifier linearization is presented. the system is designed in ka-band for a dvb-s2 satellite link. we use a six-port receiver at the linearizationloop in place of classic heterodyne receivers. the six-port receiver is implemented by the use of passive microwavecircuits and detector diodes. this approa...

Background and Objectives: In this paper, a new design strategy was proposed in order to enhance bandwidth and efficiency of power amplifier. Methods: To realize the introduced design strategy, a power amplifier was designed using TSMC CMOS 0.18um technology for operating in the Ka band, i.e. the frequency range of 26.5-40GHz. To design the power amplifier, first a power divider (PD) with a ver...

this paper proposes a low voltage (±0.55v supply voltage) low power (44.65µw) high common mode rejection ratio (cmrr) differential amplifier (d.a.) with rail to rail input common mode range (icmr), constant transconductance (gm) and enhanced frequency performance. its high performance is obtained using a simple negative averaging method so that it cancels out the common mode input signals at th...

in this study an ultra-broad band, low-power, and high-gain cmos distributed amplifier (cmos-da) utilizing a new gain-cell based on the inductively peaking cascaded structure is presented. it is created bycascading of inductively coupled common-source (cs) stage and regulated cascode configuration (rgc).the proposed three-stage da is simulated in 0.13 μm cmos process. it achieves flat and high ...

This article proposed a simple self cascode RGC amplifier configuration to increase the gain and bandwidth. The cascode amplifier eliminates the miller capacitance between input and output and facilitates high gain, high input and output impedance with high bandwidth. However, the cascode amplifier requires relatively high supply voltage for proper operation and it decreases the output voltage ...