as technology scales deep into the nanometer regime, on-chip communication becomes more susceptible to transient noise sources, such as crosstalk, external radiation, and spurious voltage spikes. the network on chip s modularity and reusability has brought about the use of error control methods to address transient errors in network on chip links.in this work, we design a fault tolerance router...

By increasing, the complexity of chips and the need to integrating more components into a chip has made network –on- chip known as an important infrastructure for network communications on the system, and is a good alternative to traditional ways and using the bus. By increasing the density of chips, the possibility of failure in the chip network increases and providing correction and fault tol...

There is a sharp decline in the network performance when wireless link fails as data path Wireless Network-on-Chip (WiNoC). To counteract this problem, we propose fault-tolerance mechanism for efficient retransmission of WiNoC. When an error detected transmission process, works to feed back fault information source node real time via signal lines. In node, highest priority assigned backup retra...

The device-level size and complexity of reconfigurable architectures makes fault tolerance an important concern in system design. In this paper, we introduce a fully-automated fault recovery system for networked systems which contain FPGAs. If a fault is detected that can not be addressed locally, fault information is transferred to a reconfiguration server. Following design recompilation to av...

In this paper, a cost-efficient fault-tolerant router design, called 20-Path Router (20PR) architecture, is proposed to reduce the impacts of faulty routers for 2D-mesh based chip multiprocessor systems. The 20PR consists of two fault-tolerant circuits: 1) a Builtin Self-Test and Self-Diagnosis (BIST/SD) circuit to detect and locate faulty FIFOs and MUXs, and 2) a Fault-Isolation (FI) circuit t...

Core-based multicast trees use less router state, but have significant drawbacks when compared to shortest-path trees, namely higher delay and poor fault tolerance. We evaluate the feasibility of using multiple independent cores within a shared multicast tree. We consider several basic designs and discuss how using multiple cores improves fault tolerance without sacrificing router state. We exa...

Cluster systems gain more and more importance as a platform for parallel computing. In this area the power of the system is strongly coupled with the performance of the network, which has to provide high bandwidth and low latency. Besides these performance aspects fault-tolerance within the network is very important. This paper shows how to build a flexible and faulttolerant router, the main bu...

The Hello protocol in OSPF allows each router in a network to check whether it can exchange messages with neighboring routers in its network. This check is carried out by making each router periodically send hello messages to every neighboring router in the network. Associated with the Hello protocol are two time periods: the hello period and the dead period. The hello period is the time period...

To avoid packet loss and deadlock scenarios that arise due to faults or power gating in multicore and many-core systems, the network-onchip needs to possess resilient communication and load-balancing properties. In this work, we introduce the Fashion router, a self-monitoring and self-reconfiguring design that allows for the on-chip network to dynamically adapt to component failures. First, we ...

Of the many router designs, most can be classified as either oblivious or adaptive, depending on whether the path selection is statically determined based on the network topology, or whether dynamic information about congestion, priorities, or faults is considered. Adaptive algorithms can be broken down into two broad categories as well: minimal or non-minimal. Minimal adaptive algorithms allow...