The textit{QIF}  (Quadrant Interlocking Factorization) method of Evans and Hatzopoulos solves linear equation systems using textit{WZ}  factorization. The  WZ factorization can be faster than the textit{LU} factorization  because,  it performs the simultaneous evaluation of two columns or two rows. Here, we present a  method for computing the real and integer textit{WZ} and  textit{ZW} factoriz...

In this article the notions of semi weak orthogonality and semi weak factorization structure in a category $mathcal X$ are introduced. Then the relationship between semi weak factorization structures and quasi right (left) and weak factorization structures is given. The main result is a characterization of semi weak orthogonality, factorization of morphisms, and semi weak factorization structur...

classes of‎ ‎abaffy-broyden-spedicato (abs) methods have been introduced for‎ ‎solving linear systems of equations‎. ‎the algorithms are powerful methods for developing matrix‎ ‎factorizations and many fundamental numerical linear algebra processes‎. ‎here‎, ‎we show how to apply the abs algorithms to devise algorithms to compute the wz and zw‎ ‎factorizations of a nonsingular matrix as well as...

classes of‎ ‎abaffy-broyden-spedicato (abs) methods have been introduced for‎ ‎solving linear systems of equations‎. ‎the algorithms are powerful methods for developing matrix‎ ‎factorizations and many fundamental numerical linear algebra processes‎. ‎here‎, ‎we show how to apply the abs algorithms to devise algorithms to compute the wz and zw‎ ‎factorizations of a nonsingular matrix as well as...

In this paper, we define a new concept of factorization for a bounded bilinear mapping $f:Xtimes Yto Z$, depended on  a natural number $n$ and a cardinal number $kappa$; which is called $n$-factorization property of level $kappa$. Then we study the relation between $n$-factorization property of  level $kappa$ for $X^*$ with respect to $f$ and automatically boundedness and $w^*$-$w^*$-continuity...

The success of high-level synthesis methods in reducing design time and formal veri cation methods in reducing design errors in digital VLSI circuits have opened the way to system-level synthesis and veri cation. Derivation is a form of formal veri cation that deals with correct-by-construction reasoning. A set of equivalence preserving transformations are used to derive an implementation from ...