This report describes the challenges in meeting the requirements for optical buffering devices in next -generation optical routers. Slow light and delay line buffering approaches are described and several recent results and issues are summarized.

During the last few years, new synchronization techniques to send data between IC’s at increasingly high datarates have been developed. Some of them rely on digital delay lines. The timing accuracy of the delay lines is crucial for a good functionality of the synchronization mechanism. This paper will present a strategy to measure the tap-delays of a digital delay-line, using the well-known osc...

In this paper we propose a new family of temperature distribution sensors based on the magnetostrictive delay line technique. An array of parallel conductors is set orthogonal to the delay line and used for pulsed current transmission. coil is set around the one end of the delay line in order to receive the magneto-elastic pulses. A platinum wire or a thermistor is electrically connected to the...

A timing discriminator design for space flight delay line image systems is presented. This discriminator processes delay line signal pulses having a few ns width and recovers event timing centroids with an accuracy better than 100 ps full width at half maximum. For space flight use, it is important to minimize parts count and power consumption. Because it is difficult or impossible to adjust eq...

The present article describes a reverberation instrument which is based on cognitive categorization of reverberating spaces. Different techniques for artificial reverberation will be covered. A multidimensional scaling experiment was conducted on impulse responses in order to determine how humans acoustically perceive spatiality. This research seems to indicate that the perceptual dimensions ar...

This paper presents a digitally programmable delay line intended for use as timing generator in a RADAR ranging system. Traditional delay lines are realized selecting the delayed signal from a tap in a cascade of delay elements, resulting in a delay resolution limited by the matching errors between the delay elements. The architecture of the programmable delay line presented in this paper uses ...