This paper presents a new supervisory control scheme, which is based on a control-relevant switching logic. Unlike most of the existing switching methods considering only estimator performance, the proposed scheme takes both estimator and controller performance into account. As an index to the controller performance, an iISS (integral-Input-to-State Stability) Lyapunov function is employed; it ...

This paper presents the first experimental demonstration of a ternary memristor-CMOS logic family. We systematically design, simulate and experimentally verify primitive functions: AND, OR NOT gates. These are then used to build combinational NAND, NOR, XOR XNOR gates, as well data handling MAX MIN Our simulations performed using 50-nm process which verified with in-house fabricated indium-tin-...

The portable devices development of semiconductor manufacturing technology, conversion efficiency, power consumption, and the size of devices have become the most important design criteria of switching power converters. For portable applications better conveniences extension of battery life and improves the conversion efficiency of power converters .It is essential to develop accurate switching...

This paper considers the problem of estimating the power consumption at logic and register transfer levels of design from an information theoretical point of view. In particular, it is demonstrated that the average switching activity in the circuit can be calculated using either entropy or informational energy averages. For control circuits and random logic, the output entropy (informational en...

The subject of this paper is hybrid control of nonlinear systems with large-scale uncertainty. We describe a high-level controller, called a “supervisor”, which orchestrates logic-based switching among a family of candidate controllers. We show that in this framework, the problem of controller design at the lower level can be reduced to 8nding an integral-input-to-state stabilizing control law ...

In this research we present the utilization of BDDs in representing propositional logic programs and implementing the refutation by resolution deduction method. A logic program is a collection of axioms from which a goal clause can be proven. Axioms are written in a standard form known as Horn clauses. In logic programming, we try to find a collection of axioms and inference steps that imply th...

A systematic theoretical-approach has been made to estimate various parameters, characteristics and their optimization methods for a Josephson junction to be useful as a high-speed switching element in Josephson digital logic electronics. The dynamic response of Josephson junction has been obtained using computer simulation. Our concept of turn-on deay of Josephson junction is applied in order ...

In this paper, we propose a bipartition dual-encoding architecture for low power pipelined circuit. Pipelined circuits consist of combinational logic blocks separated by registers which usually consume a large amount of power. Although the clock gated technique is a promising approach to reduce switching activities of the pipelined registers, this approach is restricted by the placement of the ...

The paper presents a new logic optimization method of multi-level combinational CMOS circuits, which minimizes area and power. Present methods to reduce power on logic circuits apply functional methods like logic factorization on the Boolean networks. The method described here uses Boolean transformations that exploit implications at the gate-level based on both controllability and observabil-i...

In this study, the aim is to propose a new method for fuzzification of nested dummy variables. The fuzzification idea of dummy variables has been acquired from non-linear part of regime switching models in econometrics. In these models, the concept of transfer functions is like the notion of fuzzy membership functions, but no principle or linguistic sentence have been used for inputs. Consequen...