As CMOS technologies scale to deep submicron technology nodes, improvements in transistor density and cost due to scaling inevitably come with degraded analog performance and increased device variability. Variation presents a major challenge to reliably building large arrays of mixed-signal circuits in nanometer scale CMOS processes. To determine the feasibility of creating highly sensitive rea...

This paper presents a Modified Error Data Normalized Step Size (MEDNSS) algorithm in which time fluctuating step size relies on standardization of both error and data vector. An Adaptive Noise Canceller (ANC) is utilized to enhance the system performance in the presence of signal leakage components or signal crosstalk. This ANC comprises of three microphones and two adaptive filters that conseq...

This paper presents a method based on dual threshold voltage assignment to reduce the leakage power dissipation of SRAMs while maintaining their performance. The proposed method is based on the observation that the read and write delays of a memory cell in an SRAM block depend on the physical distance of the cell from the sense amplifier and the decoder. The key idea is thus to realize and depl...

In this paper, a mathematical model of leakage sound propagation through a heat exchanger tubes array in boilers is established, which is based on the Twersky’s sound scattering theory, transmission grating diffraction theory, Fabry-Perot’s interference principle, and algebraic iteration method. The tubes array is made up of large number periodically arranged tubes immersed in air. Its acoustic...

The development of low-voltage SRAM bitcells with ultra-low static power consumption has become a primary focus of memory design in recent years. The analysis of these bitcells requires the evaluation of dynamic noise margin metrics in addition to the traditional static noise margins. In this paper, we extend the presentation of our recently proposed quasi-static RAM (QSRAM) cell that employs a...

a novel low noise trans-impedance amplifier is proposed using low cost 0.18 µm cmos technology. a resistive-capacitive feedback is used to extend the bandwidth of the amplifier. as the structure is inductor less, it is suitable for low cost integrated optical interconnects. in this paper improved particle swarm optimization have applied to determine optimal trans-resistance and noise of propose...

This paper proposes a low-noise readout circuit with noise floor of 11 fArms/sq(Hz) and bandwidth 1.3 MHz. The novel electrostatic discharge (ESD) leakage current cancellation stage allows the to detect sub-pA range input. A total trans-impedance gain 160 dB is obtained by preamplification 100 × followed transimpedance amplifier (TIA) 1 Mohm feedback resistive gain. reader designed in 0.18 ?m C...

‎ introduction: controversial results have been reported about the effect of morphine and stress on learning and spatial memory in rodents. there are very few studies about the effects of ultra low doses of morphine on memory. in this study, effects of acute administration of low and usual doses of morphine on memory formation and retention in the presence and absence of repeated stress were in...

A low-noise amplifier (LNA) and mixer circuit in 0.35m CMOS operates at 2.1 GHz. Merging the LNA and mixer lowers the number of transistors in the signal path and thereby also the nonlinearity and power consumption. The circuit meets the specifications for a direct conversion wide-band code-division multiple access (WCDMA) receiver. Its noise figure is 3.4 dB (5 kHz to 5 MHz), the total convers...

Physical implementations of cryptographic algorithms leak information, which makes them vulnerable to so-called side-channel attacks. The problem of secure computation in the presence of leakage is generally known as leakage resilience. In this work, we establish a connection between leakage resilience and fault-tolerant quantum computation. We first prove that for a general leakage model, ther...