A semi-custom high-speed datapath design flow is described using commercial ASIC design CAD tools interacting with a simple hierarchical placement Matlab code. The flow leverages the vast automation and verification capabilities of ASIC design CAD tools, while providing a precision close to a fully custom-designed circuit. The methodology is applied to the design of a 4channel, 3-GHz per-channe...

With the increase of colorectal cancer patients in recent years, the needs of quantitative evaluation of colorectal cancer are increased, and the computer-aided diagnosis (CAD) system which supports doctor's diagnosis is essential. In this paper, a hardware design of type identification module in CAD system for colorectal endoscopic images with narrow band imaging (NBI) magnification is propose...

− As system chips begin to absorb analog functionality there is increasing interest into what makes a good analog IP core. Research suggests that a solution could be the transistoronly switched current analog circuit technique, perfectly suited to modern digital processes. However, many designers are unfamiliar with this technology, favouring more conventional approaches not hindered by a lack ...

As process, temperature and voltage variations become significant in deep submicron design, timing closure becomes a critical challenge in synchronous CAD flows. One attractive alternative is to use robust asynchronous circuits which gracefully accommodate timing discrepancies. However, there is currently little CAD support for such robust methodologies. In this paper, an algorithm for technolo...

This paper presents a design CAD tool for automated of digital CMOS VLSI circuits. In order to fit the circuit performance into desired specifications, multi-objective optimization approach based on genetic algorithms (GA) is proposed and transistor sizes are calculated analytical equations describing behavior circuit. The algorithm developed in MATLAB designed verified using HSPICE simulations...

New issues come from the advent nanometric devices: defect and fault tolerance -at the physical, circuit and most importantly at the system levelis an enabling technology for building reliable nanoelectronic systems. Semiconductor manufacturers are responding to these challenges by introducing a variety of technical innovations, including new manufacture testing methodologies, virtual testing, ...

This Paper presents a 12 bit ADC is designed for the implementation of pipeline ADC. To design this ADC we used TIQ comparator that reduced the power consumption and area. The sample and hold circuit have high Sampling rate. This Design is implemented and verified on the LT spice switcher CAD-III in 0.18μm Technology.

New design methods and tools are needed to improve the process of designing dynamically reconfigurable logic. This paper reports on the revision and extension of Dynamic Circuit Switching (DCS), a CAD tool for specifying and simulating dynamically reconfigurable systems. The work introduces a new design framework, which exploits existing design practices where feasible, and proposes a new desig...