This chapter illustrates the identi cation of control-relevant models and the subsequent robust control design applied to a wafer stage. A wafer stage is part of a wafer stepper and used in chip manufacturing processes for accurate positioning of the silicon wafer on which the chips are to be produced. Accurate and fast positioning requires a robust and high-performance multivariable servo cont...

The radiative properties of patterned silicon wafers have a major impact on the two critical issues in rapid thermal processing (RTP), namely wafer temperature uniformity and wafer temperature measurement. The surface topography variation of the die area caused by patterning and the roughness of the wafer backside can have a significant effect on the radiative properties, but these effects are ...

Reactive ion etch (RIE) is commonly used in microelectromechanical systems (MEMS) fabrication as plasma etching method, where ions react with wafer surface substrate in plasma environment. Due to the importance of RIE in the MEMS field, two prediction models are established to predict the wafer status in reactive ion etching process: back-propagation neural network (BPNN) and principle componen...

Current advanced lithography processes are based on a Critical Dimension (CD) budget of 10nm or less with errors caused by exposure tool, wafer substrate, wafer process, and reticle. As such, allowable CD variation across wafer becomes an important parameter to understand, control and minimize. Three sources of errors have an effect on CD Uniformity (CDU) budget, run-to-run (R2R), wafer-to-wafe...

This article discusses a method of wafer-to-wafer bonding using metallic copper as the bonding medium. This method is commonly known as thermo-compression bonding. Bonding process is described and characterization results are presented. Reliability issues related to voids formation in the bonded layer is discussed. A survey on progress of copper-based wafer bonding and its application for 3-D I...

A novel laser that utilizes a silicon waveguide bonded to AlGaInAs quantum wells is demonstrated. This wafer scale fabrication approach allows the optical waveguide to be defined by CMOS-compatible silicon processing while optical gain is provided by III-V materials. The AlGaInAs quantum well structure is bonded to the silicon wafer using low temperature oxygen plasma-assisted wafer bonding. Th...

Almost all direct wafer bonding has been conducted between chemical-mechanically polished substrates or between thin films that were present on top of the polished substrates. Introducing chemical mechanical polishing in the wafer bonding will make a large range of materials suitable for direct wafer bonding, which has found and will find more, applications in integrated circuits, integrated op...

Novel monolithic-microwave integrated-circuit source-impedance tuners for use in on-wafer noise-parameter measurement systems are reported, which can be incorporated into a wafer probe tip. These eliminate the effect of cable and probe losses on the magnitude of a reflection coefficient that can be presented to the input of an on-wafer test device, thus enabling higher magnitudes to be synthesi...

An overview is presented of the hybrid AlGaInAs-silicon platform that enables wafer level integration of III-V optoelectronic devices with silicon photonic devices based on silicon-on-insulator (SOI). Wafer bonding AlGaInAs quantum wells to an SOI wafer allows large scale hybrid integration without any critical alignment steps. Discrete hybrid silicon optical amplifiers, lasers and photodetecto...

The variabilities of device characteristics are usually regarded as a normal distribution. If we consider the variabilities over the whole wafer, however, they cannot be expressed as a normal distribution due to the existence of global systematic component. We propose a statistical model, characterizing the global systematic component according to the distance from the center of the wafer, whic...