In order to manufacture short gap single Si nanowire (NW) field effect transistor (FET) by imprinting and transferring method, we introduce the method using Al2O3 sacrificial layer. The diameters of cylindrical Si NW addressed between Au electrodes by dielectrophoretic (DEP) alignment method are controlled to 106, 128, and 148 nm. After imprinting and transfer process, cylindrical Si NW is embe...

Si/Si1-xGex Heterostructured nanowires are grown by Reduced Pressure-Chemical Vapor Deposition (RP-CVD) using catalyst assisted Vapor Liquid Solid (VLS) and Vapor Solid Solid (VSS) method. We aim to obtain compositional (Si/Si1xGex) and/or doped (p-i-n) heterostructures with abrupt interfaces. The resulting NW heterostructures are structurally characterized using e.g. transmission electron micr...

Anode materials play a key role in the performance, in particular the capacity and lifetime, of lithium ion batteries (LIBs). Silicon has been demonstrated to be a promising anode material due to its high specific capacity, but pulverization during cycling and formation of an unstable solid-electrolyte interphase limit its cycle life. Herein, we show that anodes consisting of an active silicon ...

The larger volume of capacitor and higher leakage current of transistor have become the inherent disadvantages for the traditional one transistor (1T)-one capacitor (1C) dynamic random access memory (DRAM). Recently, the tunneling FET (TFET) is applied in DRAM cell due to the low off-state current and high switching ratio. The dual-gate TFET (DG-TFET) DRAM cell with the capacitorless structure ...

The thermoelectric figure of merit (ZT) of a single β-Silicon Carbide (SiC) nanowire (NW) was measured using the four-point three-omega (3-ω) method for the first time. The electrical conductivity (σ), thermal conductivity (κ), and Seebeck coefficient (S) were measured on the same measurement platform consisting of four point probe. To this end, we developed a novel technique in which focused i...

The applicability of a novel silicon precursor with respect to reasonable nanowire (NW) growth rates, feasibility of epitaxial NW growth and versatility with respect to diverse catalysts was investigated. Epitaxial growth of Si-NWs was achieved using octochlorotrisilane (OCTS) as Si precursor and Au as catalyst. In contrast to the synthesis approach with SiCl(4) as precursor, OCTS provides Si w...

In this paper, a three dimensional (3-D) analytical model of surface potential has been derived for gate engineered trapezoidal trigate Tunnel Field Effect Transistor (TFET). The obtained by assuming parabolic approximation the profile and solving 3-D Poisson equation using appropriate boundary conditions. device considered in work is silicon based TFET with composed two materials different fun...

Some of the fundamental problems of ultra-small MOSFETs beyond sub-10nm channel length are the electrostatic limits, source-to-drain tunnelling, carrier mobility degradation, process variations, and static leakage. The trend toward ultra-short gate length MOSFETs re‐ quires a more and more effective control of the channel by the gate leading to new device architecture. It appears that non-class...

The ionic conductance models of neuronal cells can finely reproduce a wide variety of complex neuronal activities. However, the complexity of these models has prompted the development of qualitative neuron models. They are described by differential equations with a reduced number of variables and their low-dimensional polynomials, which retain the core mathematical structures. Such simple model...

We report three representative nanowire (NW) devices for applications in stretchable electronics, strain sensing, and optical sensing. Fabrication of such devices is based on a recently developed strain-release assembly method. NWs are first aligned transversely on an elastomeric substrate using the strain-release assembly. Constant resistance is achieved in silicon (Si) NW devices stretched up...