The feasible solutions provided by a multi-objective evolutionary algorithm (MOEA) in the optimal sizing of analog integrated circuits (ICs) can be very sensitive to process variations. Therefore, to select the optimal sizes of metal–oxide–semiconductor field-effect-transistors (MOSFETs) but with low sensitivities, we propose to perform multi-parameter sensitivity analysis. However, since MOEAs...

A D-band divide-by-6 injection-locked frequency divider (ILFD) is presented. The basic mechanism of high division ratios frequency divider is investigated. The circuit employs a wideband microstrip Lange coupler, a microstrip delay line and a pair of Cascode transistors to form a feedback loop for enhanced divide-by-6 operation. The proposed ILFD is fabricated with chip size of 0.7 × 0.9mm2 in ...

A low-power, high-gain CMOS low noise amplifier (LNA) for use as the first stage of a subsampling receiver is proposed. The performance of +96-dB voltage gain and less than 1-dB Noise Figure (NF) with very low power consumption is reported for the first time and makes it suitable for subsampling mixer with Track and Hold (T/H) circuit. The LNA contains both tuned and inductorless amplifier stag...

In this research paper, Simulation and Analysis of innovative folded cascode Operational Amplifier based on carbon nanotubes (CNT) has been performed using 45 nm technology. DC voltage gain, average power, bandwidth and output resistance have been computed. CNT based folded cascode Op Amp results in high performance with the increase of CNTs. For example, the increase in DC gain is 41.48% in pC...

The cascode NMOS architecture has been tested by the Human Body Model (HBM), Machine Model (MM) and Transmission Line Pulse Generator (TLP) in this paper. For the TLP, detailed silicon data have been analyzed well in many parameters, such as the first triggeringon voltage (Vt1), the first triggering-on current (It1), the holding voltage (Vh), and the TLP I-V curve. Besides the above three kinds...

An operational amplifier designcd with O.35um CMOS teehnology is prcsented. All the transistors are realized with minimum or near-minimum ehannel length. As thc short ehannel length causcs performance degradation, a proper operational amplifier structure is sclected to compensate the performance degradation. The op amp is designed to meet the requirement of high-speed high-resolution sigma delt...

Introduction: A major building block of analogue integrated circuits is the operational transconductance amplifier (OTA), which for many applications is the most power consuming block. Recently, the folded cascode (FC) amplifier has gained preference over the telescopic owing to the low voltage nature of present and future CMOS technologies, despite the higher power budget. In addition, the PMO...

A continuous-time common-mode feedback (CMFB) circuit for low-power, area-constrained neural recording amplifiers is proposed. The proposed CMFB compact; it can be realized by simply replacing passive components with transistors in a low-noise folded cascode operational transconductance amplifier (FC-OTA) that one of the most widely adopted OTAs amplifiers. also consumes no additional power, i....