Logic synthesis is the process of automatically generating optimized logic-level representation from a high-level description. With the rapid advances in integrated circuit technology and the resultant growth in design complexity, designers increasingly rely on logic synthesis to shorten the design time while achieving performance objectives. This paper describes the IBM logic synthesis system ...

Prior to the mid 1980s, the dominance of through-hole packaging of integrated circuits (ICs) provided easy access to nearly every pin of every chip on a printed circuit board. Providing accessibility and controllability for board testing was simply a matter of probing the board. With the advent of surface mount packaging, the accessibility for probing printed circuit boards began to diminish. L...

This paper presents hardware implementation of the data encryption and decryption of the DES standard algorithm. The design consists of the S-Box circuit Exclusive-OR circuit, Circular Left Shift circuit and the control unit. The S-Box circuit implemented using 32 PLDs (Programmable Logic Device) chip that hold substitution a 48-bits input data and yields a 32-bits output data. The other circui...

This paper presents a novel number system based on signed continuous valued digits. Arithmetic operations in this number system are performed using simple analog circuitry, in contrast to the conventional implementation of arithmetic units by Boolean or multiple-valued logic circuits. Unlike the limited precision offered by classical analog arithmetic circuits, the ensemble of continuous valued...

The increased circuit density in today’s integrated circuits demands for efficient and low cost testing as compared to the testing of logic with external test equipment. The Built-In Self Test (BIST) architecture provides the self-testing of logic circuit but is not at the positive extreme in delivering deterministic and limited test vectors and storage and compression of output test responses....

Title of Thesis: SECURITY THROUGH OBSCURITY: LAYOUT OBFUSCATION OF DIGITAL INTEGRATED CIRCUITS USING DON’T CARE CONDITIONS Sana Mehmood Awan, Master of Science, 2015 Directed By: Professor Gang Qu, Department of Electrical and Computer Engineering and Institute for Systems Research, University of Maryland Contemporary integrated circuits are designed and manufactured in a globalized environment...

Today Field Programmable Gate Arrays (FPGAs) are widely used in many applications. Complicated integrated circuit chips like FPGAs are prone to different types of Faults due to environmental conditions or aging of the device. The rate of occurrence of permanent faults increases with emerging technologies because of increased density and reduced feature size, and hence there is a need for period...

It has been stated often in the past that practical acceptance of multi-valued logic awaits the development of suitable electronic means for fabricating a sufficiently powerful and general purpose logic. Though the search for such means has proceeded in parallel with every other development in the multivalued field in the last thirty years, there is reason to believe that the pace is quickening...

With the rapid advances in integrated circuit(IC) technologies, number of functions on a chip was increasing at a very fast rate, with which interconnect density is increasing especially in functional logic chips. The on-chip noise affects are increasing and needs to be addressed. In this paper we have implemented a convolution encoder using a technique that provides higher noise immunity. The ...