A one-transistor and one-resistor (1T1R) architecture with a resistive random access memory (RRAM) cell connected to an organic thin-film transistor (OTFT) device is successfully demonstrated to avoid the cross-talk issues of only one RRAM cell. The OTFT device, which uses barium zirconate nickelate (BZN) as a dielectric layer, exhibits favorable electrical properties, such as a high field-effe...

As the technology scales down to 90 nm and below, static random access memory (SRAM) standby leakage power is becoming one of the most critical concerns for low power applications. In this article, we review three major leakage current components of SRAM cells and also discuss some of the leakage current reduction techniques including body biasing, source biasing, dynamic VDD, negative word lin...

Existing noise reduction techniques for open-fitting hearing aids typically disregard the occurrence of signal leakage through the openfitting, leading to a degraded noise reduction performance. Recent miniaturization advances enable to incorporate an internal microphone in the ear mould, which is able to record this signal leakage. Recently, feedforward and combined feedforward-feedback active...

This paper presents a combined active noise control and noise reduction scheme for hearing aids to tackle secondary path effects and effects of signal leakage through the fitting. While such leakage contributions and the secondary accoustic path from the reciever to the tympanic membrane are usually not taken into account in standard noise reduction systems, they appear to have a non-negligible...

We present a charge integration photon detector (CIPD) that enables the efficient measurement of photon number states at the telecom-fiber wavelengths with a quantum efficiency of 80% and a resolution less than 0.5 electrons at 1 Hz sampling. The CIPD consists of an InGaAs PIN photodiode and a GaAs JFET in a charge integration amplifier, which is cooled to 4.2 K to reduce thermal noise and leak...

In order to reduce the power dissipation of CMOS products, semiconductor manufacturers are reducing the power supply voltage. This requires that the transistor threshold voltages be reduced as well to maintain adequate performance and noise margins. However, this increases the subthreshold leakage current of p and n MOSFETs, which starts to offset the power savings obtained from power supply re...

Abstract In order to reduce the power dissipation of CMOS products, semiconductor manufacturers are reducing the power supply voltage. This requires that the transistor threshold voltages be reduced as well to maintain adequate performance and noise margins. However, this increases the subthreshold leakage current of p and n MOSFETs, which starts to offset the power savings obtained from power ...

The purpose of this paper is to illustrate a physicallybased model allowing the statistical simulations of oxide leakage currents in MOS transistors and Floating Gate memories. This model computes the leakage current through defects randomly generated in the oxide, in case accounting for the formation of percolation paths. Furthermore, a calculation procedure has been developed to calculate the...

An attacker or evaluator can detect more information leakages if he improves the Signal-to-Noise Ratio (SNR) of power traces in his tests. For this purpose, pre-processings such as de-noise, distribution-based traces biasing are used. However, the existing traces biasing schemes can’t accurately express the characteristics of power traces with high SNR, making them not ideal for leakage detecti...