A new Quasi-Static Energy Recovery Logic family (QSERL) using the principle of adiabatic switching is proposed in this paper. Most of the previously proposed adiabatic logic are dynamic and require complex clocking schemes. The proposed Quasi-Static energy recovery logic uses two complementary sinusoidal supply clocks and resembles behaviors of static CMOS. Thus, switching activity is signiican...

The unique complementary switching behaviour of complementary resistive switches (CRSs) makes them very attractive for logic applications. The implementation of complete Boolean logic functions in a single CRS cell is certainly an extremely important step towards the commercialisation of related logic circuits, but it has not been accomplished to date. Here, we report two methods for the implem...

Bipolar resistive switching is demonstrated in the amorphous oxide semiconductor zinc–tin-oxide (ZTO). A gradual forming process produces improved switching uniformity. Al/ZTO/Pt crossbar devices show switching ratios greater than 10, long retention times, and good endurance. The resistive switching in these devices is consistent with a combined filamentary/interfacial mechanism. Overall, ZTO s...

The present work proposes a new logic-based safe switching technique, called here Stepwise Safe Switching. This technique is based on the description of the process with linear approximants which are valid in operating areas around a finite number of nominal operating points of the process. Switching takes place between common controllers for adjacent nominal operating points. Moreover, the swi...

This paper deals with speed control of DC drive fed from parallel QRC. In this work the GA optimization technique is successfully applied for speed control of QRC fed DC drive. In general PI controllers are used as conventional feedback controllers but the advent of Fuzzy logic controllers (FLC) enhances the effectiveness of control. In addition the drive fed from Zero current switching Quasi-r...

A supervisory scheme is proposed that implements Stepwise Safe Switching Logic. The functionality of the supervisory scheme is organized in the following eight functional units: StepWise Safe Switching unit, Common controllers design unit, Experimentation unit, Simulation unit, Identification unit, Trajectory cruise unit, Operating points unit and Expert system unit. The supervisory scheme orch...

Precomputation is a recently proposed logic optimization technique which selectively disables the inputs of a sequential logic circuit, thereby reducing switching activity and power dissipation, without changing logic functionality. In this paper, we present new precomputation architectures for both combinational and sequential logic and describe new precomputation-based logic synthesis methods...

This paper describes the handover mechanism in the standard 802.16e, which has implemented three handover methods  Hard Handover (HHO), Fast Base Station Switching (FBSS) and Macro Diversity Handover (MDHO) at this moment. Moreover, the handoff scheme is presented based on fuzzy logic. The mechanism takes under consideration three criteria: geographical data, received power level and used band...

Objective of this paper is to present historiography of logic switching circuits. The research mainly focuses on chronological development and application of logic in the field of electronic and computer applications. This paper briefly discussed on the basic needs of logic synthesis and also discuss few interesting facts and design consideration regarding logic synthesis. It also enhances stud...