Many embedded systems are introducing processing units to accelerate the speed of tasks, such as for multi-media applications. The mostly customized designs. Another method designing multi-unit is using pre-defined standard intellectual properties. However, procedure arranging IP cores in a system and maintaining high performance well remaining challenges. Implementing softcore processors on fi...

By integrating Altia’s Design and DeepScreen GUI development tools suite, Echelon’s Power Line Smart Transceiver and ShortStack API, and the Altera Cyclone III FPGA and Nios II embedded processor, developers have a powerful platform for developing cost-effective, yet robust energy aware solutions. These solutions allow homeowners to monitor appliance energy use via a home area network, applianc...

Introduction Video and image processing applications are typically very computationally intensive. Given the increasing processing demands, the parallel processing capabilities of Altera® programmable logic devices make them an attractive implementation option for highly repetitive tasks found in video and imaging functions. Instead of using multiple programmable digital signal processors, a si...

As fast-developing medical imaging technology promotes modern medicine, computed tomography (CT), magnetic resonance imaging (MRI), and positron emission tomography (PET) are becoming widely used in clinical diagnosis and analysis. These systems have developed from tools for noninvasive examination and anatomical structure visualization to operation planning and simulation, operation navigation...

The GCA (Global Cellular Automata) model consists of a collection of cells which change their states synchronously depending on the states of their neighbors like in the classical CA (Cellular Automata) model. In differentiation to the CA model the neighbors are not fixed and local, they are variable and global. The GCA model is applicable to a wide range of parallel algorithms. The application...

We explore the feasibility of using a coarse-grain overlay to transparently and dynamically accelerate the execution of hot segments of code that run on soft processors. The overlay, referred to as the Virtual Dynamically Reconfigurable (VDR), is tuned to realize data flow graphs in which nodes are machine instructions and the edges are inter-instruction dependences. A VDR consists of an array ...