نتایج جستجو برای: floorplanning
تعداد نتایج: 243 فیلتر نتایج به سال:
This chapter presents the application of Differential Evolution (DE) Algorithm for the VLSI floorplanning problems. DE Algorithm has been successfully applied to VLSI sequence pair representation. The important advantages of DE are its simplicity, fast convergence, and easy for implementation. DE algorithm is a population based algorithm like GA using similar operators such as crossover, mutati...
A new perturbation method, called Hierarchical-Congregated Ant System (H-CAS) has been proposed to perform the variable-order bottom-up placement for VLSI. H-CAS exploits the concept of ant colonies, where each ant will generate the perturbation based on differences in dimensions of the VLSI modules in hard modules floorplanning and differences in area of the VLSI modules in soft modules floorp...
We present a new algorithm designed to solve floorplanning problems optimally. More precisely, the algorithm finds solutions to rectangle packing problems which globally minimize wirelength and avoid given sets of blocked regions. We present the first optimal floorplans for 3 of the 5 intensely studied MCNC block packing instances and a significantly larger industrial instance with 27 rectangle...
In this paper, an improved floorplanning algorithm, named the floorplanning algorithm based on particle swarm optimization algorithm nesting simulated annealing to optimize the floorplans (PSO-SA-NoC), has been proposed with simulations conducted to verify this algorithm. The simulation results are compared with the original Simulated Annealing-NoC. The results show that the CPU’s process time ...
Floorplanning is an important step in an early phase of VLSI design. For faster design convergence, there is an urgent need to start floorplanning as early as possible, even when not all modules are designed. Therefore, it is desirable to consider floorplanning with uncertainty to obtain a compact and reliable floorplan when the dimensions and interconnections of modules are not fully determine...
Delay minimization and power minimization are two important objectives in the design of the high-performance, portable, and wireless computing and communication systems. Retiming is a very effective way for delay optimization for sequential circuits. In this paper we propose a unified framework for multi-level partitioning and floorplanning with retiming, targeting simultaneous delay and power ...
In this paper, we present a floorplanning algorithm based on sequence pair representation. Our floorplanner has the following important features: 1) It is explicitly designed for fixed-frame floorplanning, which is different from traditional well-researched minarea floorplanning. Moreover, we also show that it can be adapted to minimize total area. 2) It addresses the problem of handling alignm...
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