The paper presents a new quasi adiabatic logic family that uses two complementary split-level sinusoidal power supply clock for digital low power applications such as sensors. The proposed two-phase adiabatic static CMOS logic circuit (2PASCL) is using the principle of energy recovery and adiabatic switching. It has switching activity that is lower than dynamic logic and can be directly derived...

In this paper we propose an approach to improve the direct torque control (DTC) of an induction motor (IM). The proposed DTC is based on fuzzy logic technique switching table, is described compared with conventional direct torque control (DTC). To test the fuzzy control strategy a simulation platform using MATLAB/SIMULINK was built which includes induction motor d-q model, inverter model, fuzzy...

Due to the trade-off between power, area and performance, various efforts have been done. This work is also based to reduce the power dissipation of the vlsi circuits with the performance upto the acceptable level. The dominant term in a well designed vlsi circuit is the switching power and low-power design thus becomes the task of minimizing this switching power. So, to design a low-power vlsi...

In this paper we describe a framework for deterministic adaptive control which involves logic-based switching among a family of candidate controllers. We compare it with more conventional adaptive control techniques that rely on continuous tuning, emphasizing how switching and logic can be used to overcome some of the limitations of traditional adaptive control. The issues are discussed in a tu...

We have developed an active matrix-addressed magneto-optical spatial light modulator driven by spin-transfer switching (spin-SLM) which has a 100 × 100 array pixel layout with a 2 μm pixel pitch. It has pixel-selection-transistors and logic circuits which convert serial data into parallel data to reduce input terminals. We have confirmed successful magnetization switching of each pixel by injec...

Given a multi-modal dynamical system, optimal switching logic synthesis involves generating the conditions for switching between the system modes such that the resulting hybrid system satisfies a quantitative specification. We formalize and solve the problem of optimal switching logic synthesis for quantitative specifications over long run behavior. Our paper generalizes earlier work on synthes...

Standard static CMOS logic is responding to the requirement of high frequency and low power of digital systems. However, the digital switching noise generated by this logic is not suited for the design of performance mixedsignal integrated systems. In mixed-signal application the analog functionality can be affected by this digital switching noise and therefore resolution is degraded. The Curre...

This paper presents several techniques to synthesize logic circuits for low power based on split BDDs. The objective is to generate 2-input multiplexer circuits with reduced switching activity, since switching activity is an important contribution to power dissipation. Keywords— switching activity, BDDs, cofactor.