The goal of internal frequency compensation of a low dropout voltage regulator (LDO) is the selection of a small-value, ESR-independent output capacitor. Cascode compensation formed by a common-gate transistor acting as a current buffer, an optional series resistor, and a compensation capacitor creates a dominant pole and a left-halfplane (LHP) zero, allowing adequate phase margin and stable LD...

This paper describes the thermal and electrical characteristics of GaN on SiC power transistors that have been designed to be mounted directly upon a CMOS driver integrated circuit. In order to maximize the customer value proposition and minimize the cost implications of using a high capability GaN on SiC die, the hybrid device has to exhibit substantial performance and convenience advantages o...

A telescopic cascode opamp typically has a higher frequency capability and consumes less power than other topologies. The disadvantage of a telescopic opamp is severely limited output swing. In a conventional telescopic opamp shown in Figure 1, all transistors are biased in the saturation region. Transistors M1-M2, M7-M8 and the tail current source M9 must have at least Vds,sat to offer a good ...

A fully differential self-biased inverter-based folded cascode amplifier which uses the feedforward-regulated cascode principle is presented. A detailed small-signal analysis covering both the differential-mode and the common-mode paths of the amplifier is provided. Based on these theoretical results a design is given and transistor level simulations validate the theoretical study and also demo...

A low voltage self-biased high swing cascode current mirror (SHCCM) with improved bandwidth has been proposed. The recently reported SHCCM architecture use the bulk-driven quasi-floating gate (BDQFG) MOS transistors to enhance the effective transconductance which improves the current mirror input resistance and bandwidth range over the same architecture realized using bulk-driven MOS transistor...

Abstract: Scaling supply voltage of FinFET circuits is an efficient method to achieve low power dissipation. Superthreshold FinFET logic circuits can attain low power consumption with favorable performance, because FinFET devices operating on medium strong inversion regions can provide better drive strength than conventional CMOS transistors. The supply voltage of the super-threshold circuit is...

A low-voltage current-mode integrator is presented for a continuous-time baseband channel selection filter of wireless communication systems. Fully-balanced current-mirror structure with additional cascode transistors operated in linear region enables low-voltage and low-power dissipation properties as well as voltage-controllable cutoff frequencies over a broad frequency range. A channel selec...

Low voltage (LV) analog circuit design techniques are addressed in this tutorial. In particular, (i) technology considerations; (ii) transistor model capable to provide performance and power tradeoffs; (iii) low voltage implementation techniques capable to reduce the power supply requirements, such as bulk-driven, floating-gate, and self-cascode MOSFETs; (iv) basic LV building blocks; (v) multi...

The effect of gate – drain/source underlap (Lun) on a narrow band LNA performance has been studied, in 30 nm FinFET using device and mixed mode simulations. Studies are sssssdone by maintaining and not maintaining the leakage current (Ioff) and threshold voltage (Vth) of the various devices. LNA circuit with two transistors in a cascode arrangement is constructed and the input impedance, gain a...