High-performance and low-power are the two main criteria in modern digital design. Level converters are important to transfer low voltage input swing signal among the circuits operating at different voltages to get high voltage output swing signal. Previously feedback level converters suffer from short circuit power and long propagation delay. Multi Vth level converters and multiple supply volt...

In this paper, a new circuit scheme is proposed to reduce the power consumption of dynamic circuits. In the proposed circuit, an NMOS keeper transistor is used to maintain the voltage level in the output node against charge sharing, leakage current and noise sources. Using the proposed keeper scheme, the voltage swing on the dynamic node is lowered to reduce the power consumption of wide fan-in...

Operational Amplifier (op-amp) is a basic building block of many analog and mixed signal systems. Many different types of op-amp are used to achieve various functions, such as DC biasing, high speed amplifying, reduced voltage supply, high gain. To achieve these parameter successfully there are several techniques.The op-amp contains two stages to increase gain and improve slew rate, voltage swi...

This work presents a 24 Gb/s pseudo random bit sequence (PRBS) generator with a sequence length of 2 − 1 . The circuit uses an interleaved linear feedback shift register and multiplexing architecture. An output voltage swing of 280 mVpp is achieved for 24 Gb/s data rate and 390 mVpp for 10 Gb/s. The circuit features a trigger output which allows to trigger the eye or the sequence pattern. The c...

The OPA681 sets a new level of performance for broadband current feedback op amps. Operating on a very low 6mA supply current, the OPA681 offers a slew rate and output power normally associated with a much higher supply current. A new output stage architecture delivers a high output current with minimal voltage headroom and crossover distortion. This gives exceptional single-supply operation. U...

Abstract A high-efficient, low-voltage cross-coupled charge pump is presented in this paper. To decrease the conduction loss, a proposed based on two auxiliary dynamic inverters to increase clock swing. Meanwhile, clocking scheme designed eliminate reversion power losses. Based scheme, higher output voltage achieved by three-stage topology cascading single stage. The architectures of both and a...

A fully integrated pulsewidth modulator for Class-S power amplifiers is presented. It consists of a triangular signal generator, a comparator and output buffer. The HBT BiCMOS design of PWM circuit is applied to the LTE frequency range, which converts digitally modulated 955MHz RF carrier with 2.87GHz sampling clock. This PWM shows an EVM 6.6%, a differential output voltage swing 1.35Vp-p with ...

A fully differential envelope detector (ED) operating at 2.4GHz is designed in 90nm CMOS technology. The new design uses the common-gate topology to deal with large common-mode input signals through first-order current cancellation. Thereby, a fully differential ultra-low power super-regenerative front-end is enabled. It has a measured output voltage swing of 2.8-127mV and achieves 19.6dB outpu...

This open-loop gain enhancement circuit in 1.2pm CMOS does not require cascode or long-channel transistors, thus maximizing output swing and input common-mode range [1,21. Since gain enhancement is achieved not by increasing output resistance, but by matching main and replica amplifiers, high effective open-loop gain is maintained even with resistive loads. This circuit can be used with any tra...

A current mirror (CM) based on self cascode arrangement, useful for low voltage analog and mixed mode circuit is proposed. The CM uses 4 MOSFETs, has high input and output swing, operating at ± 0.5 V supply. Pspice simulations confirm the high performance of this CM having a bandwidth of 2.1 GHz. Resistive and capacitive compensations result in about threefold bandwidth increase to 6.1 GHz.