Silicon nanowire (SiNW) arrays were produced by electroless method on polycrystalline Si substrate, in HF/ AgNO3 solution. Although the monocrystalline silicon wafer is commonly utilized as a perfect substrate, polycrystalline silicon as a low cost substrate was used in this work for photovoltaic applications. In order to study the influence of etching time (which affects the SiNWs length) on d...

Wafers prepared by an HF dip without a subsequent water rinse were bonded at room temperature and annealed at temperatures up to 1100 “C. Based on substantial differences between bonded hydrophilic and hydrophobic Si wafer pairs in the changes of the interface energy with respect to temperature, secondary ion mass spectrometry (SIMS) and transmission electron microscopy (TEM), we suggest that h...

A new method of using photo-electromotive force in detecting gas and controlling sensitivity is proposed. Photo-electromotive force on the heterojunction between porous silicon thin layer and crystalline silicon wafer depends on the concentration of ammonia in the measurement chamber. A porous silicon thin layer was formed by electrochemical etching on p-type silicon wafer. A gas and light tran...

Direct wafer bonding is a method for fabricating advanced substrates for microelectromechanical systems (MEMS) and integrated circuits (IC). The most typical example of such an advanced substrate is the silicon-on-insulator (SOI) wafer. SOI wafers offer many advantages over conventional silicon wafers. In IC technology, the switching speed of circuits fabricated on SOI is increased by 20-50% co...

Silicon nanowire possesses great potential as the material for renewable energy harvesting and conversion. The significantly reduced spectral reflectivity of silicon nanowire to visible light makes it even more attractive in solar energy applications. However, the benefit of its use for solar thermal energy harvesting remains to be investigated and has so far not been clearly reported. The purp...

This chapter illustrates the identi cation of control-relevant models and the subsequent robust control design applied to a wafer stage. A wafer stage is part of a wafer stepper and used in chip manufacturing processes for accurate positioning of the silicon wafer on which the chips are to be produced. Accurate and fast positioning requires a robust and high-performance multivariable servo cont...

This paper describes a method for removing oxide film from the surface of silicon wafers using an inert gas fusion impulse furnace and precise determination of bulk oxygen within the wafer. A silicon wafer was cut to about 0.35 g (6 x 13 x 2 mm) and dropped into a graphite crucible. The sample was then heated for 40 s at 1300 degrees C. The wafer's oxide film was reduced by carbon and removed a...

Three-dimensional (3D) packaging with through-silicon-vias (TSVs) is an emerging technology featuring smaller package size, higher interconnection density, and better performance; 2.5D packaging using silicon interposers with TSVs is an incremental step toward 3D packaging. Formation of TSVs and interconnection between chips and/or wafers are two key enabling technologies for 3D and 2.5D packag...

germanium nanowires (genws) were synthesized using chemical vapor deposition (cvd) based on vapor–liquid–solid (vls) mechanism with au nanoparticles as catalyst and germanium tetrachloride (gecl4) as a precursor of germanium. au catalysts were deposited on silicon wafer as a thin film, firstly by sputtering technique and secondly by submerging the silicon substrates in au colloidal solution, wh...