This paper presents, a new current mode four-quadrant CMOS analog multiplier/divider based on dual translinear loops. Compared with the previous works this circuit has a simpler structure resulting in lower power consumption and higher frequency response. Simulation results, performed using HSPICE with 0.25um technology, confirm performance of the proposed circuit.

The most important advantage of voltage dividers over traditional voltage transformers is that voltage dividers do not have an iron core with non-linear hysteresis characteristics. The voltage dividers have a linear behavior with respect to over-voltages and a flat frequency response larger frequency range. The weak point of a voltage divider is the influence of external high-voltage (HV) and e...

Design of High Speed Flip-Flop Based Frequency Divider for GHz PLL System: Theory and Design Techniques in 250nm CMOS Technology Harsh Joshi, Prof. Sanjeev M.Ranjan, Prof. (Dr). Vijay nath 1 2 Department of Electronics and Telecommunication 1 2 Disha Institute Of Management & Technology, Raipur, India Department of Electronics and Telecommunication, BIT Mesra, Rachi (J.H) [email protected],...

We propose a technique with clear guidelines to design a compact planar Wilkinson power divider (WPD) for ultra-wideband (UWB) applications. The design procedure is accomplished by replacing the uniform transmission lines in each arm of the conventional power divider with varying-impedance profiles governed by a truncated Fourier series. Such non-uniform transmission lines (NTLs) are obtained t...

Background: As a significant terahertz functional device, terahertz beam splitters with high performance are highly required to meet the need for terahertz communication, terahertz image, and terahertz sensor systems. Results: The proposed 1×6 power splitter becomes 1×4 power splitter with the aid of the localized temperature change at the frequency of 1.0THz. The total output power is equivale...

This paper proposes a new stable design strategy for 1bit high order digital ∆Σ modulator for multistandard fractionalN frequency synthesizer. The proposed digital ∆Σ modulator presents simplicity, low power consumption and controls a dualmodulus divider instead of multi-modulus one as in existing ∆Σ fractional-N frequency synthesizer. Simulation results illustrate the ∆Σ modulator good perform...

─ In this paper, the design process of a novel Wilkinson power divider is presented. The proposed power divider features a simple structure with open stubs at each port. With slight changes of the dimensions of open stubs, designed power divider can suppress combinations of each two desired order harmonic simultaneously. From the measured results, 45 dB and 43 dB suppression for 3 and 5 harmoni...

A novel compact ultra-wideband (UWB) in-phase multilayer slotline power divider with high isolation is presented as a complement in slotline power divider field. The new structure proposed in this paper overcomes the shortcoming that power divider based on slotline almost cannot obtain high isolation between output ports. Based on the equivalent-circuit of microstrip-to-slotline transition and ...

Deep submicron CMOS technologies offer the high speed and low power dissipation required in multigigahertz communication systems such as optical data links and wireless products. This paper introduces the design of two communication circuits, namely a 1/2 frequency divider and a phase-locked loop, fabricated in a partially scaled 0.1 m CMOS technology. Configured as a master-slave circuit, the ...