A lifting based 2D DWT with efficient folded architecture and parallel scanning is being proposed. The architecture results in lesser hardware complexity and memory requirement due to multiplexing of 2 stages of lifting architecture. The 2D DWT architecture is realized by cascading two 2D processing elements. The coefficients for the lifting stage were chosen according with 9/7 filter. The 1D p...

We present a type-preserving translation of the polymorphic lambda calculus (System F) into an extension of the C programming language supporting parameterized classes and polymorphic methods. We observe that whilst parameterized classes alone are sufficient to encode the parameterized datatypes and letpolymorphism of languages such as ML and Haskell, it is the presence of polymorphic virtual m...

One key issue for any computational model of visual-word recognition is the choice of an input coding scheme for assigning letter position. Recent research has shown that pseudowords created by transposing two letters are very effective at activating the lexical representation of their base words (e.g., relovution activates REVOLUTION). We report a masked priming lexical decision experiment in ...

3D transpose is an important operation in many large scale scientific applications such as seismic and medical imaging. This paper proposes a novel algorithm for fast in-place 3D transpose operation. The algorithm exploits SIMD multicore architecture with software managed memory hierarchy. Such architectural features are present in the next generation processors, such as the Cell BE processor. ...

Chroma representations of musical excerpts are nowadays very popular and used for a wide variety of applications. Within these, transposition to a common key or tonality can represent an important aspect, usually having a dramatic impact to final system’s accuracy. We present and evaluate a new and straightforward way for transposing two chroma representations to a common key that outperforms p...

This paper describes a scheme for representing heterogeneous array circuits, in particular those which have been optimized by pipelining or by transposition. Equations for correctness-preserving transformations of these parametric representations are presented. The method is illustrated on developing novel pipelined designs for parallel division. It is estimated that, for a field-programmable g...