regarding the decentralization of credits management, this study examined the effect of fiscal policies on gross domestic product of the iranian provinces over the period 2001-2009. therefore, we used dynamic panel data and employed gmm-sys method to examine the model. the results show that the government expenditure and tax multiplier coefficients are less than one in short - run but greater t...

The newly proposed reconfigurable multiplier blocks offer significant savings in area over the traditional multiplier blocks for time-multiplexed digital filters or any other system where only a subset of the coefficients that can be produced by the multiplier block is needed in a given time. The basic structure comprises a multiplexer connected to at least one input of an adderhbtractor that c...

In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier design is the 53x53 multiplication of the mantissas (52 bit mantissa+1 hidden bit). This paper proposes a approach to improve this performance bottleneck by adding a redundant 54 bit initialized to ‘0’ in the mantissas o...

This paper provides a general analysis of comparative statics results in global games. I show that the effect of a change in any parameter of the global game model can be decomposed into the direct effect, which captures the effect of a change in parameters when agents’beliefs are held constant, and the multiplier effect, which captures the role of adjustments in agents’beliefs. I characterize ...

We show that a number of well known multiplier theorems for Hardy spaces over Vilenkin groups follow immediately from a general condition on the kernel of the multiplier operator. In the compact case, this result shows that the multiplier theorems of Kitada [6], Tateoka [13], Daly-Phillips [2], and Simon [11] are best viewed as providing conditions on the partial sums of the Fourier-Vilenkin se...

The Digital Image processing applications like medical imaging, satellite imaging, Biometric trait images etc., rely on multipliers to improve the quality of image. However, existing multiplication techniques introduce errors in the output with consumption of more time, hence error free high speed multipliers has to be designed. In this paper we propose FPGA based Recursive Error Free Mitchell ...

Digital Signal Processors with complex arithmetic capability (DSP-C) are useful for various applications. In this paper, we propose a method for the effective implementation of specific circuits with real coefficients on DSP-C. DSPC has special hardware such as a complex multiplier so that a complex calculation can be performed with only one instruction. First, we show that nodes with two real ...

Digital Signal Processing (DSP) often involves multiplications with a set of coefficients. This paper presents a novel multiplier design methodology for performing these coefficient multiplications with very low power dissipation. Given bounds on the throughput and the quantization error, our approach scales the original coefficients to enable the partitioning of each multiplication into a coll...

Digital Signal Processing (DSP) often involves multiplications with a fixed set of coefficients. This paper presents a novel multiplier design methodology for performing these coefficient multiplications with very low power dissipation. Given bounds on the throughput and the quantization error of the computation, our approach scales the original coefficients to enable the partitioning of each m...