Fundamentals of Electronics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.1 Discrete Solid-State Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.4 Integrated Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.39 Integrated-Circuit Logic Functions . . . . . . . . . . . . . . . . . . . . . ....

In this paper the design of a new high-speed current mode BiCMOS logic circuits isproposed. By altering the threshold detector circuit of the conventional current mode logic circuitsand applying the multiple value logic (MVL) approach the number of transistors in basic logicoperators are significantly reduced and hence a reduction of chip area and power dissipation as wellas an increase in spee...

In recent years, there have been major advances in integrated circuit technology which have both made feasible and generated great interest in electronic circuits which employ more than two discrete levels of signal. Such circuits, called multiple-valued logic circuits, offer several potential opportunities for the improvement of present VLSI circuit designs. In this paper, we give an overview ...

This paper examines the extension of constructive libraryaware logic synthesis to the physical placement stage of integrated circuit design. Constructive logic synthesis differs from traditional synthesis approaches in that it builds a circuit netlist incrementally starting from the primary inputs and proceeding towards the primary outputs. In each iteration of this procedure, the semantic stru...

This paper presents a method of broadside transition test generation for partial scan circuits. The proposed method first transforms the kernel circuit of a given partial scan circuit into some combinational circuits. Then, by performing stuck-at test generation on the transformed circuits, broadside transition tests for the original circuit are obtained. This method allows us to use existing s...

This paper describes the impact of DRAM process on the logic circuit performance of Memory Logic Merged Integrated Circuit and the alternative circuit design technology to o set the performance penalty Extensive circuit and routing simulations have been performed to study the logic circuit performance degradation when the merged chip is implemented on DRAM process Three logic processes m m and ...

Superconducting Single-Flux-Quantum (SFQ) devices have been paid much attention as alternative devices for digital circuits, because of their high switching speed and low power consumption. For large-scale circuit design, the role of computer-aided design environment is significant. As the characteristics of the SFQ devices are different from conventional devices, a new design environment is re...

The integration of logic synthesis and physical design stages will become more important to meet the challenges of integrated circuit design as device densities continue to grow and feature sizes continue to shrink [1, 2]. Many contemporary designs use a combination of macro cells and standard cells to implement the desired system functions. In a typical design, there are usually many more stan...

The synthesis of digital circuits is generally performed in two level logic switching algebra. But if we increase the representation domain from two level logic (N=2) to N>2 then the design of Multiple Valued Logic (MVL) digital circuits is possible. Interconnections play an important role in deep submicron designs as they affects power and area. Due to the requirement of interconnections the d...

ICID (Integrated Circuit IDentification) is a small mixed-signal cell that can be added to the test logic on a CMOS integrated circuit. It provides a unique 224 bit identification number that can be accessed during die test. This identification can be used to correlate test information for individual die on the wafer, through package test, and into the field and back. The identification bits ar...