Electromigration (EM) of the interconnects is a key factor in determining the reliability of an integrated circuit, especially for the present-day IC with shrinking interconnect dimension. The simulation of the EM reliability of the interconnects is usually performed using the line-via structure at the EM test temperature (e.g. 300 oC).However, such simulation using the line-via structure may n...

The effect of MOSFET gate-oxide reliability on MOS switch with bootstrapped technique is investigated with the switched-capacitor circuit in a 130-nm CMOS process. The sample-and-hold amplifier with the openloop configuration is used to verify the impact of MOS switch gate-oxide reliability on the switched-capacitor circuit. After overstress on the MOS switch of sampleand-hold amplifier, the ci...

In Cu metallization, refractory metal liners at vias generally block electromigration. As liner thicknesses are decreased, fully-blocking liners at vias become less certain due to liner ruptures. We have developed and exercised a reliability CAD tool, SysRel, for circuit-level interconnect reliability assessments, and used it to assess the impact of non-blocking vias on circuit-level reliabilit...

Aging effect degrades circuit performance in the runtime, interacts with fabrication-induced device parameter variation, and thus posing significant impact on circuit lifetime reliability. In this work, a statistical circuit optimization flow is proposed to ensure lifetime reliability of the manufactured chip in the presence of process variation and aging effects. It exploits a variation-aware ...

OBJECTIVE To assess the reliability of a 9-task wheelchair circuit. DESIGN Three test trials per subject were conducted by 2 raters. Inter- and intrarater reliability were examined. SETTING Eight rehabilitation centers in the Netherlands. PARTICIPANTS Convenience sample of 27 patients (age, >or=18 y) with spinal cord injury (SCI), all of whom were in the final stage of their inpatient reh...

As integrated circuit (IC) technology advances to the sub-100nm region, power and associated thermal effects are becoming a limiting factor in high-performance circuit design. In addition to battery lifetime for mobile devices, power and temperature are emerging as concerns due to the strong temperature-dependence of leakage power, circuit performance, IC package cost and reliability. In tradit...