Synchronous specifications are appealing in the design of large scale hardware and software systems because of their properties that facilitate verification and synthesis. When the target architecture is a distributed system, implementing a synchronous specification as a synchronous design may be inefficient in terms of both size (memory for software implementations or area for hardware impleme...

This paper is an attempt to demonstrate the potential of conditional reenement in step-wise system development. In particular, we emphasise the ease with which conditional reenement allows bounded-ness constraints to be introduced in a speciication based on unbounded resources. For example, a speciication based on purely asynchronous communication can be conditionally reened into a speciication...

Starting with modules described in Signal synchronous programming language, we present an approach to verification of GALS systems. Since asynchronous parts of a GALS system can not be described in Signal, we use a mixture of synchronous descriptions in Signal and asynchronous descriptions in Promela. Promela is the input language to the SPIN asynchronous model checker. This allows us to achiev...

In this paper the evolution of three kinds of asynchronous cellular automata are studied for the density task. Results are compared with those obtained for synchronous automata and the influence of various asynchronous update policies on the computational strategy is described. How synchronous and asynchronous cellular automata behave is investigated when the update policy is gradually changed,...

Online learning has traditionally relied on asynchronous text-based communication. The COVID-19 pandemic, though, provided many faculty members with new and/or additional experience using synchronous video-based Questions remain, about how this will shape online teaching and in the future. We conducted a mixed method study to investigate perceptions of communication technology. In paper, we pre...

Globally asynchronous locally synchronous (GALS) clocking applied to a system-on-a-chip (SoC) results in a design in which each core is a synchronous block (SB) of logic whose locally generated clock has an independent frequency and phase. Data is exchanged between cores using an asynchronous communication protocol. The nondeterministic synchronization strategies used by most GALS architectures...

In this paper we illustrate the application of a synthesis procedure used for timed asynchronous circuits to the design of synchronous circuits. In addition to providing a uniform synthesis approach, our procedure results in circuits that are significantly smaller and faster than those designed using the synchronous design tool SIS. .

In this paper we describe an implementation of a 2dimensional DCT processor and shows that the GALS (Globally Asynchronous Locally Synchronous) approach is highly suitable for implementation of such processors. Primarily it increases the design efficiency by using the divide-and-conquer approach.

Asynchronous web-based learning environments are not usually as interactive or adaptive compared to traditional classrooms. The use of synchronous communication tools may be a solution to recreating the link between students and professors. However, synchronous collaborative learning environments are often restricted to a set of communication tools and they do not offer any strategy to organize...