نتایج جستجو برای: adder

تعداد نتایج: 3231  

2016
Suresh

Binary addition is one of the most important arithmetic function in modern digital VLSI systems. Adders are extensively used as DSP lattice filter where the ripple carry adders are replaced by the parallel prefix adder to decrease the delay. The requirement of the adder is fast and secondly efficient in terms of power consumption and chip area. Speculative variable latency adders have attracted...

Journal: :Journal of accident & emergency medicine 1996
C J Reading

A review of published reports on the incidence, pathology, and treatment of adder (Vipera berus) bites in man in the United Kingdom and Europe produced numerous case studies but little information about the impact od adders as a threat to public health. Adder bites in man are not uncommon (at least 44/year and probably more than 90/year in the United Kingdom) and, although they have been record...

2016
B. Chinna Rao A. Jaya Laxmi X. Song M. Aboulhamid R. A. Patel M. Benaissa S. Boussakta K. Navi A. S. Molahosseini S. Sorouri A. A. E. Zarandi

In many building blocks of microprocessors and digital signal processing chips, adders are frequently available in their critical paths. Adders can also be used for subtraction, multiplication and division. One of the important basic arithmetic operations is addition. There are several structures like Ripple Carry Adder (RCA), Carry Look Ahead Adder (CLA) to perform the addition. Parallel prefi...

2010
TRIPTI SHARMA

The 1-bit full adder is a very important component in the design of application specific integrated circuits. Demands for the low power VLSI have been pushing the development of design methodologies aggressively to reduce the power consumption drastically. In most of the digital systems adder lies in the critical path that affects the overall speed of the system. So enhancing the performance of...

2013
Shang Ma Jian-Hao Hu Chen-Hao Wang

Modular adder is one of the key components for the application of residue number system (RNS). Moduli set with the form of can offer excellent balance among the RNS channels for multi-channels RNS processing. In this paper, a novel algorithm and its VLSI implementation structure are proposed formodulo adder. In the proposed algorithm, parallel prefix operation and carry correction techniques ar...

2013
Ashish tiwari

the probability of errors in the present VLSI technology is very high and it is increasing with technology scaling. Removing all errors is very expensive task and is not required for certain applications. There are certain application where the approximate result is acceptable e.g. image processing and video processing. For these applications Error Tolerant Adder (ETA) is proposed which provide...

2010
Rozita Teymourzadeh Burhan Yeop Majlis Masuri Othman Burhanuddin Yeop Majlis Masuri Bin Othman

This paper presents on-chip implementation of high speed low latency floating point adder /subtractor with high accuracy performance for FFT in OFDM transceiver. However due to high performance and high resolution, the floating point adder is matched with power network applications as well. The design was implemented for 32-bit pipelined adder/subtractor which satisfied IEEE-754 Standard for fl...

2013
A. Rajaram S. Saravanan R. Vijaysai

The FFT is commonly used essential tool in digital signal processing applications .The adders used in Conventional Fast Fourier transform(FFT) are no longer appropriate for the reason that of its degraded rapidity concert. There are many dissimilar kinds of fast adders such as Carry Select Adder, Carry Save Adder and Carry Look Ahead Adder have been used for Fast Fourier Transform. However, the...

2013
Gaurav Singh Ravi Kumar

-In recent years, low power circuit design has been an important issue in System on Chip (SoC) and VLSI design areas. Adiabatic logics, which dissipate less power than static CMOS logic, have been introduced as a promising new approach in low power circuit design. Adiabatic circuits are those circuits which work on the principle of adiabatic charging and discharging and which recycle the energy...

2003
B. Kiran Kumar Parag K. Lala

This paper proposes an architecture for implementing a self-checking 4-bit carry select adder that can be extended to any n-bit addition. The overhead is directly proportional to the number of transistors in the adder.

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