نتایج جستجو برای: phase lock
تعداد نتایج: 610696 فیلتر نتایج به سال:
The requirement for narrow linewidth lasers or short-loop propagation delay makes the realization of optical phase-lock loops using semiconductor lasers difficult. Although optical injection locking can provide low phase error variance for wide linewidth lasers, the locking range is restricted by stability considerations. Theoretical and experimental results for a system which combines both tec...
A complementary metal-oxide semiconductor (CMOS) lock-in pixel to observe stimulated Raman scattering (SRS) using a high speed lateral electric field modulator (LEFM) for photo-generated charges and in-pixel readout circuits is presented. An effective SRS signal generated after the SRS process is very small and needs to be extracted from an extremely large offset due to a probing laser signal. ...
A fast-lock and portable all-digital delay-locked loop (ADDLL) with 90◦ phase shift and tunable digitally-controlled phase shifter (DCPS) for DDR controller applications are presented. The ADDLL can achieve small phase-shift error in 1.3◦ at 400MHz and locking time of less than 13 clock cycles, making it very suitable for low-power DDR controller with power-down mode. The proposed DCPS provides...
We propose a novel GPS phase-lock loop (PLL) performance metric based on the standard deviation of tracking error (defined as the discriminator's estimate of the true phase error), and explain its advantages over the popular phase jitter metric using theory, numerical simulation, and experimental results. We derive an augmented GPS phase-lock loop (PLL) linear model, which includes the effect o...
Locks are efficient concurrent control mechanisms to ensure that shared resources are accessed by only a single thread in multi-threaded applications. However, for multi-core systems, lock usage leads to lock contention, which degrades program performance, increases system response time, and negatively affects scalability. This paper initially models lock contention from two aspects: static str...
This paper presents a fully integrated lock-in amplifier intended for nanowire gas sensing. The nanowire will change its conductivity according to the concentration of an absorbing gas. To ensure an accurate nanowire impedance measurement, a lock-in technique is implemented to attenuate the low frequency noise and offset by synchronous demodulation or phase-sensitive detection (PSD). The dualch...
A complete OFDM synchronization chain is proposed based on practical synchronization schemes. The synchronization is accomplished in three steps: frame detection (or timing), frequency offset estimation, and phase tracking. For frame detection, time-domain differential PN sequence is used. For frequency offset estimation, time-domain correlation of adjacent pilot symbols estimates the fractiona...
a phase-locked loop (pll) based frequency synthesizer is an important circuit that is used in many applications, especially in communication systems such as ethernet receivers, disk drive read/write channels, digital mobile receivers, high-speed memory interfaces, system clock recovery and wireless communication system. other than requiring good signal purity such as low phase noise and low spu...
Abstract In the present paper, results of a research focused on microstructure investigation steel welded joints by means non destructive thermographic technique are presented. particular, two rough obtained irregular manual welding analyzed. Active lock in thermography phase analysis is applied, basing evidence that thermal diffusivity related to diffusion length, using contrast trend as funct...
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