An experimental demonstration of a non commensurate group delay line is presented using all-pass C section networks is presented. A quasi-arbitrary group delay response can be obtained by allowing C sections with different length and properly adjusting the number of C sections in the design. The proposed C-section networks are suitable for analog signal processing of broad bandwidth (a few giga...

A delay-locked loop (DLL) based built-in self test (BIST) circuit has been designed with a 0.18 μ m TSMC process (CM018) to test chip I/O speeds, specifically, the setup and hold times of I/O registers or buffers. The frequency lock range of the DLL is 150-600 MHz (4x). The DLL uses a combined phase detector and charge pump circuit (PD+CP) for increased speed and reduced jitter. The DLL also em...

W e propose a coverage metric and a two-pass test generation method f o r path delay faults in combinational logic circuits. The coverage is measured f o r each line with a rising and a falling transition. However, the test criterion is different f r o m that of the slow-to-rise and slow-to-fall transition faults. The test, called “line delay test”, as a path delay test for the longest sensitiz...

We propose a coverage metric and a two-pass test generation method for path delay faults in combinational logic circuits. The coverage is measured for each line with a rising and a falling transition. However, the test criterion is diflerent from that of the slow-to-rise and slow-to-fall transition faults. The test, called “line delay test”, is a path delay test for the longest sensitizable pat...

A 3–8 GHz delay-locked loop (DLL) with cycle jitter calibration is presented. To lower the operation frequency of a voltage-controlled delay line (VCDL), this DLL adopts the dividers, an edge combiner, and the multiple VCDLs. A duty cycle correction circuit is presented to maintain the output duty cycle of 50%. This DLL has been fabricated in 90-nm CMOS process. The measured peak-to-peak jitter...

This paper develops the theory and digital waveguide implementation for modeling threedimensional (3D) sound emission from wind instrument air columns. It is shown that the current acoustic theory regarding sound radiation from ducts and holes can be implemented in the digital waveguide context using properly designed digital filters. Each radiating sound source or hole requires a firstor secon...