PURPOSE This study used intraoperative monitoring of the access flow to evaluate the results of flow reduction in the management of high-flow arteriovenous access-related symptoms of distal ischemia and cardiac insufficiency. METHODS A retrospective study was conducted of 95 patients (78 with ischemia, 17 with cardiac failure) who underwent flow reduction between 1999 and 2005. A preoperative...

Flash memory is becoming an increasingly important storage component among non-volatile storage devices. Its cost is decreasing dramatically, which makes it a serious competitor of disks and a candidate for enterprise-tier storage device of the future. Consequently, there is an urgent need for models and tools to analyse its behaviour and evaluate its effects on a system’s performance. We propo...

The management of temporal data is a crucial requirement for many data intensive applications. A considerable research e ort have been devoted in the past years to query languages for temporal data in the context of the relational model. Recently, temporal object-oriented data models have been proposed. In this paper, we focus on the navigational approach to querying object-oriented databases a...

Programmers obfuscate their code to defeat manual or automated analysis. Obfuscations are often used to hide malicious behavior. In particular, malicious programs employ obfuscations of stack-based instructions, such as call and return instructions, to prevent an analyzer from determining which system functions it calls. Instead of using these instructions directly, a combination of other instr...

One of the outcomes of DARPA’s HPCS program has been the creation of three new high productivity languages: Chapel, Fortress, and X10. While these languages have introduced improvements in language expressiveness and programmer productivity, several technical challenges still remain in delivering high performance with these languages. In the absence of optimization, the high-level language cons...

In a network-on-chip (NoC) based manycore architecture, an offchip data access (main memory access) needs to travel through the on-chip network, spending considerable amount of time within the chip (in addition to the memory access latency). In addition, it contends with on-chip (cache) accesses as both use the same NoC resources. In this paper, focusing on data-parallel, multithreaded applicat...

A major constraint in high-level synthesis (HLS) for large-scale ASIC systems is memory access patterns. Typically, most stateof-the-art HLS tools severely constrain the kinds of memory references allowed in the source, requiring them to have predictable access patterns or requiring dependencies between them to be statically determinable. This paper shows how these constraints can be eliminated...