نتایج جستجو برای: routability

تعداد نتایج: 188  

2013
Senthil Kumar Mathi

For frequent movement of a mobile device, there is a need for a secure registration procedure of the mobile device by announcing its current location to the home network, especially, if it is not in the home domain. While devising the registration procedure for mobile IPv6 (MIPv6) based network, it is essential to consider the security issues for cryptographic approaches and an infrastructure r...

2001
Yao-Wen Chang Jai-Ming Lin D. F. Wong

Yao-Wen Chang1, Jai-Ming Lin1, and D. F. Wong2 1Department of Computer and Information Science, National Chiao Tung University, Hsinchu 300, Taiwan 2Department of Computer Sciences, University of Texas at Austin, Austin, Texas 78712, USA Abstract Process technology advances will soon make the one-million gate FPGA a reality. A key issue that needs to be solved for the large-scale FPGAs to reali...

2014
Peer Azmat Shah Halabi B. Hasbullah Ibrahim A. Lawal Abubakar Aminu Mu'azu Low Tang Jung

Due to the proliferation of handheld mobile devices, multimedia applications like Voice over IP (VoIP), video conferencing, network music, and online gaming are gaining popularity in recent years. These applications are well known to be delay sensitive and resource demanding. The mobility of mobile devices, running these applications, across different networks causes delay and service disruptio...

2005
Zdenek Pliva Ondrej Novak Krystyna Siekierska Miroslaw Grodner

In this paper we present our new educational chip. This chip is one of three chips which were designed for educational purposes within the framework of the IST project REASON. Nowadays the Boundary Scan (BS) has become to be a standard for diagnostic access to the circuits, for in-circuit programming and for several other tasks. The Boundary Scan access is sometimes combined with a scan chain o...

Journal: :IEEE Trans. VLSI Syst. 2001
Abhishek Ranjan Kia Bazargan S. Ogrenci Majid Sarrafzadeh

Floorplanning is a crucial phase in VLSI Physical Design. The subsequent placement and routing of the cells/modules are coupled very closely with the quality of the floorplan. A widely used technique for floorplanning is Simulated Annealing. It gives very good floorplanning results but has major limitation in terms of running time. For more than tens of modules Simulated Annealing is not practi...

Journal: :Computer Networks 2014
Wen-Kang Jia

Nowadays more and more wireless users are on move while accessing the Internet, and providing mobility support in IP networks has been a long-standing challenge. Client-based Mobile IPv6 (MIPv6) is the most widely known mobility management scheme, and fast emerging Proxy-based Mobile IPv6 (PMIPv6) scheme offers an alternative. However, some inherent problems such as route optimization in these ...

Journal: :JCP 2008
Javid Jaffari Mohab Anis

Rapid increase in transistor density and operating frequency has led to the increase in power densities, exhibiting itself as a high temperature profile. The high temperature spots over an FPGA impact the power, performance, and reliability of the chip, hence should be addressed during the design process. The logic block placement is targeted as the natural starting point to address the non-uni...

Journal: :IEEE Trans. on CAD of Integrated Circuits and Systems 2003
Mao-Hsu Yen Hung-Kuan Yen Chu Yu

This paper explores theories on designing optimal multipoint interconnection structures, and proposes a simple switch box design scheme which can be directly applied to field programmable gate arrays (FPGAs), switch box designs, and communication switching network designs. We present a new hyperuniversal switch box designs with four sides and terminals on each side, which is routable for every ...

Journal: :VLSI Design 2012
Min Pan Yue Xu Yanheng Zhang Chris C. N. Chu

Modern large-scale circuit designs have created great demand for fast and high-quality global routing algorithms to resolve the routing congestion at the global level. Rip-up and reroute scheme has been employed by the majority of academic and industrial global routers today, which iteratively resolve the congestion by recreating the routing path based on current congestion. This method is prov...

2004
A. Dasu A. Akoglu S. Panchanathan

Increasing demand for configuration time aware processing with stringent constraints for flexibility necessitates the design and development of a dynamically fast reconfigurable processor. This paper focuses on the extraction of tasks or core clusters in Control Data Flow Graphs (CDFGs) of applications, architectures to embed them in Hybrid-FPGA environments and the routing architecture necessa...

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