نتایج جستجو برای: single error upset seu
تعداد نتایج: 1116761 فیلتر نتایج به سال:
Static random access memories (SRAMs) are prone to a single-event upset (SEU), also known as soft errors, due transient noise caused by single strike of radiation. Beam testing has been extensively used measure the SEU cross section SRAMs function linear energy transfer (LET) charged particle The evolution LET is called curve, which plays vital role in rate analysis for hardness assurance. Vari...
of [Nemo97]: Single-event upset (SEU) tolerance for commercial 1Mbit SRAMs, 4Mbit SRAMs, 16Mbit DRAMs and 64Mbit DRAMs was evaluated by irradiation tests using high-energy heavy ions with an LET range between 4.0 and 60.6 MeV/(mg/cm2). The threshold LET and the saturated cross-section were determined for each device from the LET dependence of the SEU cross-section. We show these test results an...
By Bill Hamon, M.S. Washington State University MAY 2009 Chair: George S. La Rue This thesis presents the implementation of a self-calibrating low-power Digitally Controlled Synthesizer (DCS) operating at 5 GHz in the IBM 90nm process. The DCS has high tolerance to device and process variations because of its mostly digital design. It provides an extremely wide tuning range with fine resolution...
Ever-increasing demands of space missions for data returns from their limited processing and communications resources have made the traditional approach of data gathering, data compression, and data transmission no longer viable. Increasing on-board processing power by providing high-performance computing (HPC) capabilities using commercial-off-the-shelf (COTS) components is a promising approac...
Larger field programmable gate array (FPGA) configuration memories and shrinking design rules have raised concerns about single event upsets (SEUs), especially for highreliability, high-availability systems that use FPGAs. We present a design for the on-line detection and correction of SEUs in the configuration memory of Xilinx Virtex-4 and Virtex-5 FPGAs. The design corrects all single-bit err...
Resumo: Este trabalho descreve a implementação de um sistema de vídeo sob demanda seguindo o framework para desenvolvimento de sistemas orientados a objetos “LogicOO”. Este framework utiliza o conceito de ontologias no seu nível mais alto de abstração, o que permite o reuso do conhecimento sobre o domínio analisado. O protótipo construído, denominado Hipervisão, disponibiliza aos seus usuários ...
Experimental mono-energetic proton single-event upset (SEU) cross-sections of a 65 nm low core-voltage static random access memory (SRAM) were found to be exceptionally high not only at energies (< 3 MeV), but also > MeV and extending up tens MeV. The SEU cross-section from 20 protons exceed the 200 by almost factor 3. Similarly, neutron 14 are about lower than cross-section. Thanks Monte-Carlo...
At each advanced technology node, it is crucial to characterize and understand the mechanisms affecting performance reliability. Scaling for all nodes prior 5-nm bulk FinFET node had resulted in a decrease single-event upset (SEU) cross section at node. However, this trend unexpectedly reversed scaling from 7-nm Experimental results show that SEU sections D flip-flops (D-FFs) designs are greate...
Radiation induced transient faults like single event upsets (SEU) and multiple event upsets (MEU) in memories are well researched. As a result of the technology scaling, it is observed that the logic blocks are also vulnerable to malfunctioning when they are deployed in radiation prone environment. However, the current literature is lacking efforts to mitigate such issues in the digital logic c...
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