tiple GRD chips can be easily connected to configure scalable neural network hardware. Because a RISC processor is incorporated within the GRD chip, it does not need the host machine control for these tasks. This is desirable for embedded systems in practical industrial applications, together with the fast online learning capability. The results on simulating an adaptive equalizer in digital mo...

ion, neuromorphic systems are meant to expose the implications of a physical realization of interacting neural and synaptic elements. Discussing how and why this approach can be radically different from the ones based on simulating networks of interacting neurons on a general (or special) purpose computer would bring us beyond the scope of the present paper. It is worth mentioning, however, tha...

We have described a challenging neural-network hardware implementation that would mate a 64x64-pixel infhred sensor directly on to a 3-dimensionally packaged set of neural processing chips with parallel input for high speed image processing. We now describe two enhanced schemes. In one the synapse (analog multiply device) resolution has been increased from 7to 8-bit without increasing the silic...

Abstruct -A digital architecture which uses stochastic logic for simulating the behavior of Hopfield neural networks is described. This stochastic architecture provides mussiw paruf/e/ism (since stochastic logic is very space efficient), reprogrammability (since synaptic weights are stored in digital shift registers), large dynumic runge (by using either fixed or floating-point weights), unneul...

Systems on Chips are increasingly involved in critical equipment the fields of aeronautics, transportations, and energy. Therefore, monitoring their life cycle is a crucial issue for safety hazard-prevention. This paper deals with data-driven method online prediction Remaining Useful Life (RUL) safety-critical System-on-Chips (SoC). based detection drifts operating temperatures. The work starts...

Hybrid CMOS/nanoelectronic circuits, combining CMOS chips with simple nanoelectronic crossbar add-ons, may extend the exponential Moore-Law progress of microelectronics beyond the 10-nm frontier. This paper reviews the development of neuromorphic networks (“CrossNets”) based on this prospective technology. In these networks, the neural cell bodies (“somas”) are implemented in the CMOS subsystem...

Computation with spiking neurons takes advantage of the abstraction of action potentials into streams of stereotypical events, which encode information through their timing. This approach both reduces power consumption and alleviates communication bottlenecks. A num-ion of action potentials into streams of stereotypical events, which encode information through their timing. This approach both r...

Implanted transducers for functional electrical stimulation (FES) powered by inductive links are subject to conflicting requirements arising from low link eflciency, a low power budget and the need for protection of the weak signals against strong RF electromagneticJields. We propose a solution to these problems by partitioning the RF transceiver and sensor/actuator functions onto separate inte...

Convolutional Neural Networks (CNNs) exhibit remarkable performance in various machine learning tasks. As sensor-equipped Internet of Things (IoT) devices permeate into every aspect of modern life, the ability to execute CNN inference, a computationally intensive application, on resource constrained devices has become increasingly important. In this context, we present Cappuccino, a framework f...

Retinal models based on the Cellular Neural Network (CNN) paradigm [2] have been widely used [3-8]. These neuromorphic models are based on retinal anatomy and physiology [1, 10-11]. In this paper a framework is proposed for qualitative spatiotemporal studies in vertebrate retinas. The underlying retinal anatomy is followed as closely as possible, the characteristics of the physiological models,...