A fast settling multipath CMOS OTA for high speed switched capacitor applications is presented here. With the basic topology similar to folded-cascode, bandwidth and DC gain of the OTA are enhanced by adding extra paths for signal from input to output. Designed circuit is simulated with HSPICE using level 49 parameters (BSIM 3v3) in 0.35μm standard CMOS technology. DC gain achieved is 56.7dB an...

The paper presents current adder and subtractor circuits based on cascode current mirror with improved linearity and wide linear range. The proposed circuits can be used for analog signal processing applications such as amplifiers, operational transconductance amplifiers (OTA), Gm-C filters, etc. In the proposed circuits, cascode current mirror topology is employed to improve current mirroring ...

Whereas SiC switches have the overall lowest dynamic losses, they show higher static losses due to the lack of conductivity modulation and the necessary chip size limitations due to the still high SiC base material price. The frequency dependence of the total losses of the various 1200V configurations (Si-IGBT + Si freewheeling diode, Si IGBT + SiC Schottky diode, SiC-JFET cascode plus internal...

We propose a mode-locking method optimized for the cascode structure of an RF CMOS power amplifier. To maximize the advantage of the typical mode-locking method in the cascode structure, the input of the cross-coupled transistor is modified from that of a typical mode-locking structure. To prove the feasibility of the proposed structure, we designed a 2.4 GHz CMOS power amplifier with a 0.18 μm...

This paper examines architectural techniques for providing concurrent error detection in self-timed VLSI pipelines. Signal pairs from Differential Cascode Voltage Switch Logic are compared with a checker that is composed of a tree of dual-rail (morphic) comparators to detect errors and signal completion. An efficient implementation is shown that compares favorably in speed and area with convent...