The authors show how continuous-time active-RC filters can be implemented in CMOS by replacing all resistors by MOSFETs operating in the linear region. As an example, a 24MHz activeMOSFET-C single-amplifier biquadratic lowpass filter with a pole-Q of 3 implemented in a 0.6μm CMOS process is discussed. By comparing measurements of a test chip, simulations and calculations, the following conclusi...

Low noise amplifier when simulated for system level configuration, the scattering matrix in general and scattering parameters in specific play vital role in performance of low noise amplifier for various frequency bands. In this paper the scattering parameter performance was analyzed for C-band for recent process technologies available for CMOS and BiCMOS for IEEE 802.11 b/g.

A 23.8-GHz tuned amplifier is demonstrated in a partially scaled 0.1m silicon-on-insulator CMOS technology. The fully integrated three-stage amplifier employs a common-gate, source–follower, and cascode with on-chip spiral inductors and MOS capacitors. The gain is 7.3 dB, while input and output reflection coefficients are 45 and 9.4 dB, respectively. Positive gain is exhibited beyond 26 GHz. Th...

A 1V, 1GHz low noise amplifier (LNA) has been designed and simulated using Spectre simulator in a standard TSMC 0.18um CMOS technology. With low power and noise optimization techniques, the amplifier provides a gain of 24 dB, a noise figure of only 1.2 dB, power dissipation of 14 mW from a 1 V power supply.

In this work a low power, low voltage and high gain operational amplifier is proposed. For this purpose a negative resistance structure is used in parallel with output to improve the achievable gain. Because of using self cascode transistors in the output, the proposed structure remains approximately constant in a relatively large output voltage swing causing an invariable gain. To evaluate the...

This paper presents the design and Implementation of a novel CMOS Instrumentation Amplifier using capacitive neutralization feedback transconductance techniques for bioelectric signal enhancement. The proposed amplifier also implements indirect current feedback, operating at 3-volt supply. With compact footprint 0.062mm² on chip, achieves an impressive bandwidth 4.2MHz 85 dB CMRR. Implemented 0...

We propose a design methodology of a low-voltage CMOS low-noise amplifier (LNA) consisting of a common-source and a common-gate stages. We first derive equations of power gain, noise figure (NF) and input third-order intercept point (IIP3) of the two-stage LNA. A design methodology of the LNA is presented by using graphs based on analytical equations. A 1-V 5.4-GHz LNA was implemented in 0.15-μ...

A new method based on adaptive GA(genetic algorithm) for optimizing the parameters of CMOS operational amplifier is presented in this paper. The synthesis of the Op-amp (operational amplifier) can be translated into multiple-objective optimization task, in which a large number of specifications have to be taken into account. Such as DC-gain, bandwidth of unity gain, phase-margin, power, noise a...

In this contribution, a highly efficient CMOS based operational amplifier has been presented that uses the circuit arrangement so as to provide an extra bias current into a conventional CMOS differential input signal which is required for high performance of the system. The design of a high performance CMOS operational amplifier (op-amp) with level 3 parameters at 0.2ìm CMOS technology, that ma...

This paper demonstrated the first 2-stage, 2.8W, 1.8V, 1.9GHz fully-integrated DAT power amplifier with 500 input and output matching using 0.18pm CMOS transistors. It has a small-signal gain of 27dB. The amplifier provides 2.8W of power into a 50n load with a PAE of 50%.