In this paper we propose a new concept for multiplication by using modified booth algorithm and reversible logic functions. Modified booth algorithm produces less delay compare to normal multiplication process. Modified booth algorithm reduces the number partial products which will reduces maximum delay count a the output. by combining modified booth algorithm with reversible gate logic it will...

A delay and power model of a CMOS inverter driving a resistive-capacitive load is presented. The model is derived from Sakurai’s alpha power law and exhibits good accuracy. The model can be used to design and analyze those inverters that drive a large RC load when considering both speed and power. Expressions are provided for estimating the propagation delay, transition time, and short circuit ...

In this paper, the lower-than-expected frequency performance observed in many AlGaN/GaN high electron mobility transistors (HEMTs) has been attributed to a significant drop of the intrinsic small-signal transconductance (gm) with respect to the intrinsic DC gm. To reduce this gmcollapse and improve high frequency performance, we have developed a new technology based on a combination of vertical...

| It is known that the clock-period in a sequential circuit can be shorter than the maximum signal delay between registers if the clock arrival time to each register is controlled. We propose an algorithm to nd the minimum clock-period of a circuit whose signal propagation delays are given. Experimental results on LGSynth93 benchmarks show that this technique achieves as much as about 16% reduc...

A three-step algorithm is presented for discrete gate sizing problem of delay/area optimization under double-sided timing constraints. The problem is rst formulated as a linear program. The solution to the linear program is then mapped onto a permissible set. Using this permissible set, the gate sizes are adjusted to satisfy the delay lower and upper bounds simultaneously.

We report a thermally activated metastability in a GaAs double quantum dot exhibiting real-time charge switching in diamond shaped regions of the charge stability diagram. Accidental charge traps and sensor backaction are excluded as the origin of the switching. We present an extension of the canonical double dot theory based on an intrinsic, thermal electron exchange process through the reserv...

In this paper, we perform a theoretical study of processes that demonstrates additional time delay obtained by remodeling Brillouin gain spectrum, and we also study the main influence factors on pulse time delay and broadening, as well as analyze the ways which increases the delay, and further suppresses pulse broadening. The results show that by remodeling Brillouin gain spectrum, one obtains ...

Carbon nanotube (CNT) based transistors have been studied in recent years as potential alternatives to CMOS devices because of their capability of near ballistic transport. In this work the non-equilibrium Green’s function (NEGF) formalism is used to perform a comprehensive study of CNT based transistors. The effect of inelastic phonon scattering on the gate-delay time of CNT based transistors ...

We propose a novel acceleration scheme for Monte Carlo based statistical static timing analysis (MC-SSTA). MC-SSTA, which repeatedly executes ordinary STA using a set of randomly generated gate delay samples, is widely accepted as an accuracy reference. A large number of random samples, however, should be processed to obtain accurate delay distributions, and software implementation of MC-SSTA, ...