Domino logic is widely used for high switching speed and high performance circuits. In dynamic logic, problem arises while cascading one gate to another. In order to cascade dynamic logic, domino logic is used which consists of an inverter used between two stages. Robustness of domino logic diminishes with downscaling as leakage power increases. This paper presents a new proposed domino logic c...

The newly appeared idea of Logical Stochastic Resonance (LSR) is verified in synthetic gene networks induced by non-Gaussian noise. We realize the switching between two kinds of logic gates under optimal moderate noise intensity by varying two different tunable parameters in a single gene network. Furthermore, in order to obtain more logic operations, thus providing additional information proce...

The design and analysis of a power distribution network is one of the most important areas in high-speed digital systems. The main function of a power distribution network is to supply power to core logic and I/O circuits in any digital system. With increasing clock speeds accompanied by decreasing signal rise times and supply voltages, the transient currents injected into the power distributio...

This chapter describes basic logic circuits. This can be seen as largely background material for applications in later chapters in the design of dividers and phase detectors in frequency synthesizers. The types of logic discussed will be CMOS rail-to-rail logic, CMOS current mode logic (CML), bipolar CML, and bipolar emitter coupled logic (ECL). Note that CML is a general term and applies to bo...

Arithmetic Logic Unit (ALU) can be implemented in various ways using different logics. We are proposing an ALU design in which logic gates are implemented using Differential Cascode voltage switching logic (DCVSL). Manchester Carry Chain (MCC) is used to reduce the delay when addition or subtraction is performed in ALU. Using DCVSL logic gates we can obtain complemented outputs without any extr...

---In this paper a thorough investigation of resistive logic gate DCI has been made. The current equations of this gate at each stage have been deduced. The dynamic response of this DCI gate has been obtained by the computer-simulation. Our concept of turn-on delay has been introduced. The effect of overdrive current on turn-on delay for resistive logic gate has been shown. This will provide a ...

---In this paper a thorough investigation of resistive logic RCJL gate has been made. The current equations of this gate at each stage have been deduced. The dynamic response of this gate has been obtained by the computer-simulation. Our concept of turn-on delay has been introduced. The effect of overdrive current on turn-on delay for resistive logic gate has been shown. This will provide a bet...

This paper addresses the problem of controlling a continuous-time linear system with large modelling errors. We employ an adaptive control algorithm consisting of a family of linear candidate controllers supervised by a high-level switching logic. Methods for constructing such controller families have been discussed in the recent paper by the authors. The present paper concentrates on the switc...

This paper demonstrates all-optical digital logic gates using bistable monolithic semiconductor ring lasers (SRLs). With the flexible multi-functional experimental setup, we have experimentally demonstrated the application of SRLs to realize logic functions including: AND, OR, NOR, XOR and all-optical non-return-to-zero (NRZ) to return-to-zero (RZ) format conversion. Using bistable semiconducto...

Timed Shannon circuits have been proposed as a synthesis approach for a low power optimization technique at the logic level since overall circuit switching probabilities may be reduced. An improvement in the application of this principle for multi-output circuits is presented. Techniques that trade area for power reduction and a method for minimizing the overall circuit switching probability ar...