This paper describes a low-voltage, low-jitter clock synthesizer and a temperaturecompensated tunable oscillator. Both of these circuits employ a self-correcting Delay-Locked Loop (DLL) which solves the problem of false locking associated with conventional DLLs. This DLL does not require the delay control voltage to be set on power-up, it can recover from missing reference clock pulses and beca...

The design and simulation of a 1.35 GHz fully integrated CMOS frequency synthesizer for a double band receiver is presented. The proposed synthesizer is based in a wide-band PLL topology with a high reference frequency. This approach allows obtaining low phase noise, fast switching time, a low divider ratio and a reduction in the total chip area. Besides, the use of a novel charge-pump circuit ...

T his is the final article in a five-part series on microwave frequency synthesizers. It concludes with a review of advanced synthesizer solutions. Although synthesizers can be found in virtually any microwave system, test and measurement (T&M) is probably the most challenging application that calls for advanced synthesizer techniques. This final article addresses some specific T&M requirements...

In this study, a C~K band frequency synthesizer used in broadband electronic warfare equipment was designed, developed, and the measurement results were presented. The structure of designed generates signal up to 6 GHz using only direct digital synthesizer(DDS) without mixer or multiplier. For signals above frequency, uses addition, variable sampling DDS circuit improve quality by reducing spur...

SUMMARY This paper presents a standard cell-based frequency synthesizer with dynamic frequency counting (DFC) for multiplying input reference frequency by N times. The dynamic frequency counting loop uses variable time period to estimate and tune the frequency of digitally-controlled oscillator (DCO) which enhances frequency detection's resolution and loop stability. Two ripple counters serve a...

We describe operational challenges and progress of optical frequency-comb dividers (OFDs) that synthesize RF signals from the optical domain. Our priorities include: (1) ultra-low phase-noise, (2) continuous operation, and (3) broadly low Allan deviation.

A nonlinear behavior model of a charge-pump based frequency synthesizer is implemented and verified against a transistor level implementation in a mixed circuit simulator. The presented behavior model is shown to be drastically faster while still giving an accurate prediction of the acquisition process. The model reliance is assured by identifying and implementing the nonlinear characteristics ...