A technique is proposed for the design of a modified CMOS regulated cascode having an output impedance significantly greater than that of a conventional regulated cascode. Simulation results for an illustrative design, operating at 10μA from a 1V supply, show an increase in output resistance from 636MΩ and output bandwidth of 55kHz for a conventional circuit to 6.68GΩ and 389kHz, respectively, ...

Solution-based organic field-effect transistors (OFETs) with low parasitic capacitance have been fabricated using a self-aligned method. The self-aligned processes using a cross-linking polymer gate insulator allow fabricating electrically stable polymer OFETs with small overlap area between the source-drain electrodes and the gate electrode, whose frequency characteristics have been investigat...

This paper reviewed the efficiency of CMOS class AB power amplifier topology especially in gigahertz frequencies. is a compromise between A and B terms linearity 50% to 78.5%. However, cannot have good simultaneously due breakdown gate-oxide voltage effects from hot carrier. The oxide prevents optimum drain signal effect carrier will reduce quality overall PA design. Several works year 1999 201...

The object of this research was a self-resonated inverter, based on paralleled Insulated-Gate Bipolar Transistors (IGBTs), for high-frequency induction heating equipment, operating in wide range output powers, applicable and industrial purposes. For the nominal installed capacity these types invertors to be improved, presented inverter with modified circuit comprising IGBT transistors connected...

This paper presents an optimized methodology to folded cascode operational transconductance amplifier (OTA) design. The design is done in different regions of operation, weak inversion, strong inversion and moderate inversion using the gm/ID methodology in order to optimize MOS transistor sizing. Using 0.35μm CMOS process, the designed folded cascode OTA achieves a DC gain of 77.5dB and a unity...

In this paper, we applied self-aligned T-gate design to aligned carbon nanotube array transistors and achieved an extrinsic current-gain cutoff frequency (ft) of 25 GHz, which is the best on-chip performance for nanotube radio frequency (RF) transistors reported to date. Meanwhile, an intrinsic current-gain cutoff frequency up to 102 GHz is obtained, comparable to the best value reported for na...

In recent years, there has been an increasing demand for high-speed digital circuits at low power consumption. This paper presents a design of input stage of Operational Amplifier i.e cascode differential amplifier using a standard 65nm CMOS Technology.A comparison betweem gate-driven, bulk-driven and cascode bulk driven bulk-driven differential amplifier is described. The Results demonstrate t...

A body-biasing compensation scheme based on two proportional-toabsolute-temperature (PTAT) circuits is proposed to reduce the PVT variability of the DC gain of cascode amplifiers. A brief description of a basic PTAT is given as well as its application to cascode-based operational transconductance amplifiers. Simulation results show that the proposed compensated circuit amplifier exhibit a (DC) ...