A universal BiCMOS low-voltage-swing transceiver (driver/receiver) with low on-chip power consumption is reported. Using a 3.3 V supply, the novel transceiver can drive/receive signals from several low-voltage-swing transceivers with termination voltages ranging from 5 V down to 2 V and frequencies well above 1 GHz. Measured results of test circuits fabricated in 0.8m BiCMOS technology are also...

This paper presents the design and the implementation of input/output (I/O) interface circuits for Gb/s-per-pin operation, fully compatible with low-voltage differential signaling (LVDS) standard. Due to the differential transmission technique and the low voltage swing, LVDS allows high transmission speeds and low power consumption at the same time. In the proposed transmitter, the required tol...

Current-mode-logic circuits play an important role in the design of CMOS frequency synthesizers for modern wireless digital communication systems. They provide the building blocks for frequency dividers with input frequencies in the range of the desired carrier frequencies. In this communication we estimate the upper limit frequency as a function of the gate length using voltage swing considera...

The advantages of fully-depleted (FD) SOI CMOS technology in comparison to bulk Si regarding analogue circuit design have been reported in [1]. Most of them relate to the combination of the reduced capacitance of SOI technology with the better transconductance (gm) over drain current (IDS) ratio due to the reduced FD body factor, which provides enhanced bandwidth and gain, resulting in very sig...

In Very Large Scale Integration (VLSI), interconnect design has become a supreme issue in high speed ICs. With the decreased feature size of CMOS circuits, on-chip interconnect now dominates both circuit delay and power consumption. An eminent technique known as repeater/buffer insertion is used in long interconnections to reduce delay in VLSI circuits. This paper deals with some distinct low p...

This paper presents the analysin ,design and implementation of a high voltage ratio topology of DC-DC converter. The DC-DC converter has high voltage ratio with reduced input current, output voltage and output current ripple, and also reduces the voltage and current rating of power electronics components and compared with conventional boost converter. The voltage stress on the switches are  red...

Abstract This report is an outcome of a master degree project at Linköpings University in cooperation with Micronic Laser Systems AB. The purpose with this master degree project was to investigate how to implement a receiver in a data transfer system. The system consists of several data channels, where every channel consists of three parts: driver, transmission lines and receiver. The driver se...

This letter presents an approach to engineer the band structure of carbon nanotube field-effect transistors via selected area chemical gating. By exposing the center part, or the contacts, of nanotube devices to oxidizing or reducing gases, a good control over the threshold voltage and subthreshold swing has been achieved. Our experiments reveal that NO2 shifts the threshold voltage positively,...

This paper proposes a sleep transistor based minimum size inverter in BSIM4.3.0, 50nm CMOS technology with supply voltage of 1V, power dissipation of 46.28nW at 0.502V and maximum drain current of 70nA. The operating frequency is 1GHz. The disadvantage is decrease in voltage swing by 15% compared to the conventional CMOS Inverter of the same size, whereas the power dissipation is only 1.117% of...