During the last decades it has been shown that the Atomic Force Microscope (AFM) can be used in noncontact mode as an efficient lithographic technique capable of manufacturing nanometer sized devices on the surface of a silicon wafer. The AFM nanooxidation approach is based on generating a potential difference between a cantilever needle tip and a silicon wafer. A water meniscus builds up betwe...

For the bottleneck problem of the conversion efficiency in silicon-based solar cell, the Metallization Wrap– through (MWT) technology is one of the effective methods based on the analysis of factors affecting the solar cell conversion efficiency. The MWT technology is based on laser perforation and that the bus grid lines in the front surface of the solar cell are moved to the back surface. The...

Imaging the band-to-band photoluminescence of silicon wafers is known to provide rapid and high-resolution images of the carrier lifetime. Here, we show that such photoluminescence images, taken before and after dissociation of iron-boron pairs, allow an accurate image of the interstitial iron concentration across a boron-doped p-type silicon wafer to be generated. Such iron images can be obtai...

Micromachining arbitrary 3D silicon structures for micro-electromechanical systems can be accomplished using gray-scale lithography along with dry anisotropic etching. In this study, we have investigated the use of deep reactive ion etching (DRIE) and the tailoring of etch selectivity for precise fabrication. Silicon loading, the introduction of an O2 step, wafer electrode power, and wafer temp...

This paper gives a brief overview of the challenges wafer cleaning technology is facing in the light of advanced silicon technology moving in the direction of non-planar device structures and the need for modified cleans for semiconductors other than silicon. In the former case, the key issue is related to cleaning and conditioning of vertical surfaces in next generation CMOS gate structure as ...

Introduction The semiconductor industry is now facing a major turning point in how to realize the next generation of large-scale integration. Recently 3D integration (3DI) using through-silicon via (TSV) has widely studied and wafer thinning has been considered to be a promising technology for enhancing system performance instead of conventional two-dimensional (2D) scaling due to technical and...

During the last decades it has become evident that novel lithographic techniques are required in order to fabricate nanosized devices. It has been shown that non-contact AFM is an efficient technique, capable of manufacturing nanometer sized devices on the surface of a silicon wafer. The AFM nanooxidation approach is based on generating a potential difference between a cantilever needle tip and...

We have calculated, theoretically, the acoustic pressure field around a linear pattern on a silicon wafer immersed in water subjected to a megasonic beam. The method of calculation is based on a Green’s function formalism. The acoustic force applied on the pattern by the pressure field is determined as a function of frequency and the angle the incident megasonic beam makes with the wafer surfac...

The continuation of Moore’s law by conventional complementary metal oxide semiconductor (CMOS) scaling is becoming more and more challenging, requiring huge capital investments. On proposed scenario is the implementation of compound semiconductors as parts of advanced CMOS devices for More-than-Moore integration. The continuation of improved performance characteristics in CMOS manufacturing is ...