Silicon nanowires (Si NWs) are being manufactured for use as sensors and transistors for circuit applications. The goal was to assess pulmonary toxicity and fate of Si NW using an in vivo experimental model. Male Sprague-Dawley rats were intratracheally instilled with 10, 25, 50, 100, or 250 μg of Si NW (~20-30 nm diameter; ~2-15 μm length). Lung damage and the pulmonary distribution and cleara...

We report a general approach for three-dimensional (3D) multifunctional electronics based on the layer-by-layer assembly of nanowire (NW) building blocks. Using germanium/silicon (Ge/Si) core/shell NWs as a representative example, ten vertically stacked layers of multi-NW field-effect transistors (FETs) were fabricated. Transport measurements demonstrate that the Ge/Si NW FETs have reproducible...

We present a sensor platform associated to silicon-nanowire chemical field effect transistors (Sinw-ChemFET). Innovations concern the use of networks of suspended silicon N+/P/N+ nanowires as conducting channel, the realization by thermal oxidation and Atomic-Layer Deposition (ALD) of a SiO2/Al2O3 gate insulator all-around the silicon nanowires, and their final integration into covered SU8-base...

Semiconductor nanowires (NWs) represent a unique system for exploring phenomena at the nanoscale and are expected to play a critical role in future electronic, optoelectronic, and miniaturized biomedical devices. Modulation of the composition and geometry of nanostructures during growth could encode information or function, and realize novel applications beyond the conventional lithographical l...

Controlled and uniform assembly of "bottom-up" nanowire (NW) materials with high scalability presents one of the significant bottleneck challenges facing the integration of nanowires for electronic applications. Here, we demonstrate wafer-scale assembly of highly ordered, dense, and regular arrays of NWs with high uniformity and reproducibility through a simple contact printing process. The ass...

We numerically investigate the possibility of using Tunnel field-effect transistor (TFET) in a 32 kHz crystal oscillator circuit to reduce power consumption. A simulation using SPICE (Simulation Program with Integrated Circuit Emphasis) is carried out based on a conventional CMOS transistor model. It is shown that the power consumption of TFET is one-tenth that of conventional low-power CMOS.

Lateral orientated growth of In2O3 nanowire (NW) and nanorod (NR) arrays has been achieved by a vapor transport and condensation method on (001) and (111) surfaces of Si substrates. The single crystalline In2O3 NWs and NRs were grown along [211] in parallel to the Si +/-[110] and lying in the substrate plane. The electrical measurements show that the In2O3 NWs are p-type semiconductor. By N+ do...

A porphyrin-silicon nanowire (Si-NW) hybrid field-effect transistor is introduced. The hybrid device has separate electrical and optical gates surrounding the Si-NW channel. Porphyrin, a component of chlorophyll, is employed as an optical gate to modulate the potential of the Si-NW channel. Due to the independently formed hybrid gates, both optical and electrical excitation can effectively modu...

Gate-all-around (GAA) MOSFETs use multiple nanowires (NWs) to achieve target ION, along with excellent 3-D electrostatic control of the channel. Although the self-heating effect has been a persistent concern, the existing characterization methods, based on indirect measure of mobility and specialized test structures, do not offer adequate spatiotemporal resolution. In this paper, we develop an ...

Nanowires (NWs) are recently used in several sensor or actuator devices to improve their ordered characteristics. Silicon nanowire (Si NW) is one of the most attractive one-dimensional nanostructures semiconductors because of its unique electrical and optical properties. In this paper, silicon nanowire (Si NW), is synthesized and characterized for application in photovoltaic device. Si NWs are ...