A self-consistent analysis of the quantum-well emission transistor (QWET) is presented allowing an exact calculation of the device quantum properties. Poisson’s and Schrcdinger’s equation are solved numerically using a finite-difference method on a self-consistent basis. Pseudomorphic AlGaAs/InGaAs designs with 150/o-20% excess In are suggested for improving the device performance. Design with ...

We propose a method for dual supply voltage digital design to reduce energy consumption without violating the given performance requirement. Although the basic idea of placing low voltage gates on non-critical paths is well known, a new two-step procedures does it so more efficiently. First, given a circuit and its nominal single supply voltage, we find a suitable value for a lower second suppl...

With fast switching speeds and large interconnect trees (MCMs), the resistance and inductance of interconnect has a dominant impact on logic gate delay. In this paper, we propose a new model for distributed RC and RLC interconnects to estimate the driving point admittance at the output of a CMOS gate. Using this model we are able to compute the gate delay eeciently, within 25% of SPICE-computed...

With fast switching speeds and large interconnect trees (MCMs), the resistance and inductance of interconnect has a dominant impact on logic gate delay. In this paper, we propose a new Π model for distributed RC and RLC interconnects to estimate the driving point admittance at the output of a CMOS gate. Using this model we are able to compute the gate delay efficiently, within 25% of SPICE-comp...

2 ADD-Based Timing Analysis The problem of calculatin& the timing r8poose of a combin... tionallogic block can be formulated as follows: GiYen a combinational block, find the set of input vectors for which the length of the critical path, under a .pecified mode of operation and a gate delay model, is maximum; the length of the critical path gi~ the overall block delay. Given a gate g of the net...

An efficient analytical method for calculating the propagation delay and the short-circuit power dissipation of CMOS gates is introduced in this paper. Key factors that determine the operation of a gate, such as the different modes of operation of serially connected transistors, the starting point of conduction, the parasitic behaviour of the short-circuiting block of a gate and the behaviour o...

We present a method for power and delay optimization by input reordering. We observe that the reordering has a significant effect on the power dissipation of the gate which drives the reordered gate. This is because the input capacitance depends on the signal values of other inputs. This property, however, has not been utilized for power reduction. Previous approaches focus on the reduction of ...

Quantum-dot cellular automaton (QCA) is a novel nanotechnology with a very different computational method in compared with CMOS, whereas placement of electrons in cells indicates digital information. This nanotechnology with specifications such as fast speed, high parallel processing, small area, low power consumption and higher switching frequency becomes a promising candidate for CMOS tec...