RF On-chip Test by Reconfiguration Technique

The paper addresses on-chip test for IC RF transceivers. The baseband DSP available on chip serves as a tester while the RF front-end is reconfigured for test. The basic test setup is a loopback, enabled by a test attenuator and in some cases by an offset mixer, too. Different variants of this setup adopt the bypassing technique to boost testability. The existing limitations and tradeoffs in terms of test feasibility, controllability and observability versus the chip performance are discussed. The fault-oriented approach and the sensitization techniques are emphasized vs the functional test. The impact of production tolerances is addressed in terms of the detectability thresholds. Key-words: RF test, DfT, BiST, on-chip test, RF transceivers