Implementation of neuromorphic systems: from discrete components to analog VLSI chips

ion, neuromorphic systems are meant to expose the implications of a physical realization of interacting neural and synaptic elements. Discussing how and why this approach can be radically different from the ones based on simulating networks of interacting neurons on a general (or special) purpose computer would bring us beyond the scope of the present paper. It is worth mentioning, however, that the biological neural network is a large, massively parallel intricate web of noisy, extremely low power, quite slow elements, that manage to exploit the above features such as to outperform by far man-made machines designed for fast and reliable computation. Those features are shared to a large extent by networks of analog silicon neurons operating in a sub-threshold (low power consumption) regime [1], and open the way to a serious attempt at duplicating some key features of the biological system. In a sense, this amounts to take a step back from the abstract level of implementationindependent approach to intelligent computation that was the hallmark of artificial intelligence, hoping that by designing devices as close as possible to the choices that nature made we might have a chance to be naturally let to build efficient architectures for neural networks. Implementation of neuromorphic systems: from discrete components to analog VLSI chips (testing and communication issues) Vittorio DANTE, Paolo Del GIUDICE and Maurizio MATTIA Laboratorio di Fisica, Istituto Superiore di Sanità, Roma Summary. We review a series of implementations of electronic devices aiming at imitating to some extent structure and function of simple neural systems, with particular emphasis on communication issues. We first provide a short overview of general features of such “neuromorphic” devices and the implications of setting up “tests” for them. We then review the developments directly related to our work at the Istituto Superiore di Sanità (ISS): a pilot electronic neural network implementing a simple classifier, autonomously developing internal representations of incoming stimuli; an output network, collecting information from the previous classifier and extracting the relevant part to be forwarded to the observer; an analog, VLSI (very large scale integration) neural chip implementing a recurrent network of spiking neurons and plastic synapses, and the test setup for it; a board designed to interface the standard PCI (peripheral component interconnect) bus of a PC with a special purpose, asynchronous bus for communication among neuromorphic chips; a short and preliminary account of an application-oriented device, taking advantage of the above communication infrastructure.